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Re: Change exceptions and interrupts Base for MIPS32

Elad Yosef <> writes:

> Hi,
> My target is MIPS32 4KEc (not the 4Kc)
> In this CPU, I can configure the base address for exceptions/interrupts.
> The fetch/reset address is always 0xBFC0:0000 and resides inside a ROM
> The ROM is very small. The ROM code only enables the flash device and
> jumps to the RedBoot code in the flash (reset_vector code)
> The Flash device is not mapped to  0xBFC0:0000, according to my platform.
> My issue here is:
> Where is the best location to update the base address?
> variant_init? platfrom_init ? or even in earlier stage inside _start ?

The location of the vectors is controlled by the BEV bit in the status
register. If you take a look at the header you will see that
the initial value of this register is defined by INITIAL_SR. If your
platform HAL defines this in its then it will override
the default and allow you to clear the BEV bit. There is no need for
extra code.

Nick Garnett                                       eCos Kernel Architect
eCosCentric Limited       The eCos experts
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