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bit band macro names from Cortex-M3


Hi.

I'd like to be get suggestions about suitable macro names for bit band operations on the Cortex-M3.

Since this is a MCU option, they should be defined per MCU.

Actually working on the LPC17XX, I have defined:

//=============================================================================
// LPC17XX supports CORTEX-M3 bit banding option
#define CYGHWR_HAL_LPC17XX_BITBAND_SRAM_PHY 0x20000000 // to 0x200FFFFF (1 meg)
#define CYGHWR_HAL_LPC17XX_BITBAND_SRAM_BB 0x22000000
// Convert SRAM address
#define CYGHWR_HAL_LPC17XX_BITBAND_SRAM(address,bit)\
((CYGHWR_HAL_LPC17XX_BITBAND_SRAM_BB +\
(address-CYGHWR_HAL_LPC17XX_BITBAND_SRAM_PHY)*32 +\
(bit*4)))


#define CYGHWR_HAL_LPC17XX_BITBAND_PERI_PHY 0x40000000 // to 0x400FFFFF
#define CYGHWR_HAL_LPC17XX_BITBAND_PERI_BB 0x42000000
// Convert PERIPHERAL address
#define CYGHWR_HAL_LPC17XX_BITBAND_PERI(address,bit)\
((CYGHWR_HAL_LPC17XX_BITBAND_PERI_BB +\
(address-CYGHWR_HAL_LPC17XX_BITBAND_PERI_PHY)*32 +\
(bit*4)))


Use case:

// add channel to pool
*(volatile cyg_uint32 *)CYGHWR_HAL_LPC17XX_BITBAND_PERI(ADC_CR,1<<chan->channel)=1;


Another possibility would be to provide higher level macros for bit set/test/read-modify-write operations and have these macros to use bit band if the targets support them. However bit band operations will probably be used only in driver code specific to a MCU familly and the driver designer may prefer to explicitly states when a bit band operation is used.

Since I'll provide some drivers in the next weeks, it would be nice if these drivers already use macro names acceptable for eCos maintainers.

Bernard


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