H8/300 and H8S architecture

["Uwe Kindler" <ukindler at htwm dot de>]

Hello John,

here are the main differences between H8/300 and H8S CPUs:


Register Architecture
=====================

H8/300:
-------
- Sixteen 8-bit general registers, or
- Eight 16-bit general registers
- PC (16 Bit)
- CCR (Condition Code Register - 8 Bit)

H8S:
-------
- Sixteen 16-bit general registers
- also usable as sixteen 8-bit registers
- or eight 32-bit registers
- PC (24 Bit)
- CCR (Condition Code Register - 8 Bit)
- EXR (Extended Register - 8 Bit)
- MAC (Multiply-Accumulate Rgister -  64 Bit (only H8S/2600))


Address Space
=====================

H8/300:
-------
- Maximum 64K-byte address space (PC is 16 Bit)

H8S:
-------
- 16-Mbyte address space (PC is 24 Bit)


Interrupt Handling
=====================

H8/300:
-------
- normal Interrupt mode
- When "I" bit is set to "1," in CCR register, all interrupts except NMI are
masked.
- 64 Interrupt vectors (2 Bytes long each)

H8S:
-------
- extended Interrupt control mode
- mask control is done in eight levels for interrupt requests except for NMI
by comparing the EXR interrupt mask level (I2 to I0 bits)
- 8 different interrupt priority levels (level 0 - level 7)
- 128 Interrupt vectors (4 Bytes long each)


Because of these differences in register architecture the HAL_SavedRegisters
structure is completely differrent for both architectures. Also the global
interrupt handling, masking and vector table differs in both architectures.
That means large parts af the vectors.S and context.S (which are part of the
eCos architecture HAL) are different for both architectures. In my opinion,
mixing these both architectures in only one H8/300 architecture is possible
but make it a lot more complicated and harder to understand (just have a
look at the current EDOSK-2674 port)

Best Regards, Uwe Kinlder