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ARM exception handling fix
- From: Mark Salter <msalter at redhat dot com>
- To: ecos-patches at sources dot redhat dot com
- Date: Thu, 29 Aug 2002 07:50:14 -0400
- Subject: ARM exception handling fix
Index: hal/arm/arch/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/arch/current/ChangeLog,v
retrieving revision 1.76
diff -u -p -5 -r1.76 ChangeLog
--- hal/arm/arch/current/ChangeLog 28 Aug 2002 03:02:48 -0000 1.76
+++ hal/arm/arch/current/ChangeLog 29 Aug 2002 11:48:46 -0000
@@ -1,5 +1,9 @@
+2002-08-29 Mark Salter <msalter@redhat.com>
+
+ * src/vectors.S: Avoid entering thumb mode in exception handlers.
+
2002-08-27 Mark Salter <msalter@redhat.com>
* src/arm.ld: Undefine arm to avoid problem with .note.arm.ident.
2002-08-22 Mark Salter <msalter@redhat.com>
Index: hal/arm/arch/current/src/vectors.S
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/arch/current/src/vectors.S,v
retrieving revision 1.46
diff -u -p -5 -r1.46 vectors.S
--- hal/arm/arch/current/src/vectors.S 23 May 2002 23:01:42 -0000 1.46
+++ hal/arm/arch/current/src/vectors.S 29 Aug 2002 11:48:47 -0000
@@ -583,10 +583,11 @@ call_exception_handler:
// switch to pre-exception mode to get banked regs
mov r0,sp // r0 survives mode switch
mrs r2,cpsr // Save current psr for return
orr r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+ bic r1,r1,#CPSR_THUMB_ENABLE
msr cpsr,r1
stmfd r0!,{r8-r12,sp,lr}
msr cpsr,r2 // back to svc mode
mov sp,r0 // update stack pointer
@@ -642,10 +643,11 @@ return_from_exception:
// switch to pre-exception mode and restore r8-r14
add r2,sp,#armreg_r8
mrs r1,cpsr
orr r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+ bic r0,r0,#CPSR_THUMB_ENABLE
msr cpsr,r0
ldmfd r2,{r8-r14}
msr cpsr, r1 // back to svc mode
// move sp,lr and pc for final load
@@ -722,10 +724,11 @@ handle_IRQ_or_FIQ:
// switch to pre-exception mode to get banked regs
mov r0,sp // r0 survives mode switch
mrs r2,cpsr // Save current psr for return
orr r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+ bic r1,r1,#CPSR_THUMB_ENABLE
msr cpsr,r1
stmfd r0!,{r8-r12,sp,lr}
msr cpsr,r2 // back to svc mode
mov sp,r0 // update stack pointer