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PPC - Improve SCC3 handling on MPC852T


Index: hal/powerpc/adder/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/adder/current/ChangeLog,v
retrieving revision 1.8
diff -u -5 -p -r1.8 ChangeLog
--- hal/powerpc/adder/current/ChangeLog	24 Mar 2003 21:59:29 -0000	1.8
+++ hal/powerpc/adder/current/ChangeLog	31 Mar 2003 15:42:17 -0000
@@ -1,5 +1,9 @@
+2003-03-31  Gary Thomas  <gary at mlbassoc dot com>
+
+	* cdl/hal_powerpc_adder.cdl: Enable use of SCC3 on AdderII.
+
 2003-03-24  Gary Thomas  <gary at mlbassoc dot com>
 
 	* misc/redboot_ROMRAM.ecm: Remove.
 
 	* misc/adder_redboot_ROMRAM.ecm: 
Index: hal/powerpc/adder/current/cdl/hal_powerpc_adder.cdl
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/adder/current/cdl/hal_powerpc_adder.cdl,v
retrieving revision 1.5
diff -u -5 -p -r1.5 hal_powerpc_adder.cdl
--- hal/powerpc/adder/current/cdl/hal_powerpc_adder.cdl	24 Mar 2003 21:59:29 -0000	1.5
+++ hal/powerpc/adder/current/cdl/hal_powerpc_adder.cdl	31 Mar 2003 14:21:06 -0000
@@ -99,11 +99,11 @@ cdl_package CYGPKG_HAL_POWERPC_ADDER {
             display       "Adder-I with 852T"
             requires      !CYGHWR_HAL_POWERPC_ADDER_I
             requires      { CYGHWR_HAL_POWERPC_MPC8XX == "852T" }
             default_value 0
             implements    CYGNUM_HAL_QUICC_SMC1
-#            implements    CYGNUM_HAL_QUICC_SCC3
+            implements    CYGNUM_HAL_QUICC_SCC3
             define_proc {
                 puts $::cdl_header "#define HAL_PLATFORM_CPU    \"PowerPC 852T\""
                 puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"A&M AdderII\""
             }
             description "
Index: hal/powerpc/quicc/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.33
diff -u -5 -p -r1.33 ChangeLog
--- hal/powerpc/quicc/current/ChangeLog	31 Mar 2003 15:27:50 -0000	1.33
+++ hal/powerpc/quicc/current/ChangeLog	31 Mar 2003 15:49:11 -0000
@@ -1,5 +1,10 @@
+2003-03-31  Gary Thomas  <gary at mlbassoc dot com>
+
+	* src/quicc_smc1.c (cyg_hal_sccx_init_channel): Proper handling
+	(signal routing) for SCC3 - differs on 850 and 850T!
+
 2003-03-31  Jonathan Larmour  <jifl at eCosCentric dot com>
 
 	* src/quicc_smc1.c (cyg_hal_smcx_init_channel): 
 	(cyg_hal_sccx_init_channel): 
 
Index: hal/powerpc/quicc/current/src/quicc_smc1.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/src/quicc_smc1.c,v
retrieving revision 1.27
diff -u -5 -p -r1.27 quicc_smc1.c
--- hal/powerpc/quicc/current/src/quicc_smc1.c	31 Mar 2003 15:27:51 -0000	1.27
+++ hal/powerpc/quicc/current/src/quicc_smc1.c	31 Mar 2003 15:48:46 -0000
@@ -609,10 +609,11 @@ cyg_hal_sccx_init_channel(struct port_in
 
         break;
 #endif
 #if CYGNUM_HAL_QUICC_SCC3 > 0
     case QUICC_CPM_SCC3:
+#if defined(CYGHWR_HAL_POWERPC_MPC8XX_850)
 #if 0
 // CAUTION!  Enabling these bits made the port get stuck :-(
         /* CTS/RTS/CD on PortC.4/5/13 */
         eppc->pio_pcdir &= 0x0C04;
         eppc->pio_pcpar &= 0x0C00;
@@ -623,12 +624,19 @@ cyg_hal_sccx_init_channel(struct port_in
         /* RxD/TxD on PortB.24/25 */
         eppc->pip_pbpar |= 0x00C0;
         eppc->pip_pbdir |= 0x00C0;
         eppc->pip_pbodr &= ~0x00C0;
 
+#elif defined(CYGHWR_HAL_POWERPC_MPC8XX_852T)
+        eppc->pio_papar |= 0x30;
+        eppc->pio_padir &= ~0x30;
+        eppc->pio_paodr &= ~0x30;
+#else
+#error "Cannot route SCC3 I/O"
+#endif // 850T
         break;
-#endif
+#endif // SCC3
     }
 
     // Set up baud rate generator.  These are allocated from a
     // pool, based on the port number and type.  The allocator
     // will arrange to have the selected baud rate clock steered
@@ -637,11 +645,10 @@ cyg_hal_sccx_init_channel(struct port_in
     *(info->brg) = 0x10000 | (UART_BIT_RATE(UART_BAUD_RATE)<<1);
 
     /*
      *  Set pointers to buffer descriptors.
      */
-    memset((void *)uart_pram, 0xFF, 0x100);
     uart_pram->rbase = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*info->Rxnum + info->Rxnum);
     uart_pram->tbase = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*info->Txnum + info->Txnum);
 
     /*
      *  SDMA & LCD bus request level 5
Index: devs/serial/powerpc/quicc/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/serial/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.17
diff -u -5 -p -r1.17 ChangeLog
--- devs/serial/powerpc/quicc/current/ChangeLog	28 Mar 2003 13:14:39 -0000	1.17
+++ devs/serial/powerpc/quicc/current/ChangeLog	31 Mar 2003 15:41:14 -0000
@@ -1,5 +1,10 @@
+2003-03-31  Gary Thomas  <gary at mlbassoc dot com>
+
+	* src/quicc_smc_serial.c (quicc_sxx_serial_init): Handle SCC3 on
+	various processors (signal routing differs).
+
 2003-03-28  Gary Thomas  <gary at mlbassoc dot com>
 
 	* src/quicc_smc_serial.c: Change how buffers are allocated & aligned
 	to a cache line - previous attempt wasted a huge amount of space.
 
Index: devs/serial/powerpc/quicc/current/src/quicc_smc_serial.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.c,v
retrieving revision 1.14
diff -u -5 -p -r1.14 quicc_smc_serial.c
--- devs/serial/powerpc/quicc/current/src/quicc_smc_serial.c	28 Mar 2003 18:23:26 -0000	1.14
+++ devs/serial/powerpc/quicc/current/src/quicc_smc_serial.c	31 Mar 2003 15:40:50 -0000
@@ -716,13 +716,20 @@ quicc_sxx_serial_init(struct cyg_devtab_
                                    &quicc_scc3_txbuf[0],
                                    RxBD, 
                                    CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SCC3_RxNUM,
                                    CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SCC3_RxSIZE,
                                    &quicc_scc3_rxbuf[0],
+#if defined(CYGHWR_HAL_POWERPC_MPC8XX_850)
                                    0x0000, // PortA mask
                                    0x00C0, // PortB mask
                                    0x0000, // PortC mask
+#elif defined(CYGHWR_HAL_POWERPC_MPC8XX_852T)
+                                   0x0030, // PortA mask
+                                   0x0000, // PortB mask
+                                   0x0000, // PortC mask
+#err "Cannot route SCC3"
+#endif
                                    QUICC_CPM_SCC3
             );
     }
 #endif
     (chan->callbacks->serial_init)(chan);  // Really only required for interrupt driven devices


-- 
------------------------------------------------------------
Gary Thomas                 |
MLB Associates              |  Consulting for the
+1 (970) 229-1963           |    Embedded world
http://www.mlbassoc.com/    |
email: <gary at mlbassoc dot com>  |
gpg: http://www.chez-thomas.org/gary/gpg_key.asc
------------------------------------------------------------


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