Re: edb7211 flash without CYGHWR_IO_FLASH_DEVICE_NOT_IN_RAM

[Jani Monoses <jani at iv dot ro>]

> On Tue, 2003-04-01 at 06:41, Jani Monoses wrote:
> > Hi
> > this makes the flash of edb7xxx put flash functions in 2ram. sections
> > instead of implementing CYGHWR_IO_FLASH_DEVICE_NOT_IN_RAM and use flash_dev_query
> > instead of directly calling flash_query.
> > I tested this and it's ok.
> 
> Why not just retrofit this driver to use the generic Intel StrataFlash
> driver?  That should make things much simpler in the long run.
> 
> n.b. This was one of the very first FLASH drivers written, and thus
> came long before any of the generic driver setups were ready.
> 

I did that last year, made it use 28fxxx and worked fine. I don't know whether I submitted it
or just asked if I should but I got no answer...I can dig that patch out and 
send it.I saw that 28fxxx does not use disable/enable cache macros as some other
drivers do and I don't know if that's the way to go or not because flash drivers are so different
among each other in ecos
I'm willing to work on cleanup issues like this if it's Ok and someone will review the changes
Only with the cache macros in is the code in 28F equivalent to edb
So if this looks fine I'll send the edb patch which makes use of the generic intel driver.
If you say I shoudl go with strata instead of 28 I'll do that.And by the way something 
I raised a couple of times before the other intel generic flash (bootblock) is not used by any package
and is superceded by the others anyway.

Jani.


Index: devs/flash/intel//28fxxx/current/include/flash_28fxxx.inl
===================================================================
RCS file: /cvs/ecos/ecos/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx.inl,v
retrieving revision 1.8
diff -u -r1.8 flash_28fxxx.inl
--- devs/flash/intel//28fxxx/current/include/flash_28fxxx.inl	12 Dec 2002 21:15:27 -0000	1.8
+++ devs/flash/intel//28fxxx/current/include/flash_28fxxx.inl	28 Mar 2003 13:41:54 -0000
@@ -237,6 +237,14 @@
     volatile flash_data_t *ROM;
     flash_data_t* id = (flash_data_t*) data;
     flash_data_t w;
+    int cache_on;
+
+    HAL_DCACHE_IS_ENABLED(cache_on);
+    if (cache_on) {
+        HAL_DCACHE_SYNC();
+        HAL_DCACHE_DISABLE();
+    }
+
 
     ROM = (volatile flash_data_t*) CYGNUM_FLASH_BASE;
 
@@ -257,6 +265,10 @@
     
     // Stall, waiting for flash to return to read mode.
     while (w != ROM[0]);
+   
+    if (cache_on) {
+        HAL_DCACHE_ENABLE();
+    }
 }
 
 //----------------------------------------------------------------------------
@@ -273,6 +285,14 @@
     volatile flash_data_t *b_p = (flash_data_t*) block;
     volatile flash_data_t *b_v;
     cyg_bool bootblock;
+    int cache_on;
+
+    HAL_DCACHE_IS_ENABLED(cache_on);
+    if (cache_on) {
+        HAL_DCACHE_SYNC();
+        HAL_DCACHE_DISABLE();
+    }
+
 
     ROM = FLASH_P2V((unsigned long)block & flash_dev_info->base_mask);
 
@@ -335,6 +355,10 @@
 
     CYGHWR_FLASH_WRITE_DISABLE();
     
+    if (cache_on) {
+        HAL_DCACHE_ENABLE();
+    }
+
     return res;
 }
 
@@ -354,6 +378,14 @@
     volatile flash_data_t* data_p = (flash_data_t*) data;
 
     int res = FLASH_ERR_OK;
+    int cache_on;
+
+    HAL_DCACHE_IS_ENABLED(cache_on);
+    if (cache_on) {
+        HAL_DCACHE_SYNC();
+        HAL_DCACHE_DISABLE();
+    }
+
 
     // Base address of device(s) being programmed. 
     ROM = FLASH_P2V((unsigned long)addr & flash_dev_info->base_mask);
@@ -444,6 +476,10 @@
 
     CYGHWR_FLASH_WRITE_DISABLE();
     
+    if (cache_on) {
+        HAL_DCACHE_ENABLE();
+    }
+
     // Ideally, we'd want to return not only the failure code, but also
     // the address/device that reported the error.
     return res;
@@ -463,10 +499,17 @@
     volatile flash_data_t *b_v;
     cyg_bool bootblock;
     int len, len_ix = 1;
+    int cache_on;
 
     if (!flash_dev_info->locking)
         return res;
 
+    HAL_DCACHE_IS_ENABLED(cache_on);
+    if (cache_on) {
+        HAL_DCACHE_SYNC();
+        HAL_DCACHE_DISABLE();
+    }
+
 #ifdef DEBUG
     d_print("flash_lock_block %08x\n", block);
 #endif
@@ -519,6 +562,10 @@
 
     CYGHWR_FLASH_WRITE_DISABLE();
     
+    if (cache_on) {
+        HAL_DCACHE_ENABLE();
+    }
+
     return res;
 }
 
@@ -638,10 +685,17 @@
 
     cyg_bool bootblock;
     int len, len_ix = 1;
+    int cache_on;
 
     if (!flash_dev_info->locking)
         return res;
 
+    HAL_DCACHE_IS_ENABLED(cache_on);
+    if (cache_on) {
+        HAL_DCACHE_SYNC();
+        HAL_DCACHE_DISABLE();
+    }
+
     ROM = (volatile flash_data_t*)((unsigned long)block & flash_dev_info->base_mask);
 
 #ifdef DEBUG
@@ -695,6 +749,9 @@
 
     CYGHWR_FLASH_WRITE_DISABLE();
     
+    if (cache_on) {
+        HAL_DCACHE_ENABLE();
+    }
     return res;
 
     // FIXME: Unlocking need to support some other parts in the future