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PrPMC1100 port


New port for Motorola PrPMC1100 based on Intel XScale IXC1100 CPU.
The IXC1100 is a close relative of the IXP425 and uses the IXP425
HAL.

--Mark


Index: packages/NEWS
===================================================================
RCS file: /cvs/ecos/ecos/packages/NEWS,v
retrieving revision 1.73
diff -u -p -5 -r1.73 NEWS
--- packages/NEWS	21 May 2003 18:41:29 -0000	1.73
+++ packages/NEWS	5 Jun 2003 13:16:31 -0000
@@ -1,5 +1,6 @@
+* New port for Motorola PrPMC1100 (Intel XScale IXC1100)
 * SNTP client supports IPv6 multicast packets from time servers.
 * DNS client support looking up IPv6 addresses and reverse lookups
 * FTP client is IPv6 aware.
 * httpd daemon is IPv6 aware.
 * TFTP client and TFTP server now work with both IPv4 and IPv6.
Index: packages/ecos.db
===================================================================
RCS file: /cvs/ecos/ecos/packages/ecos.db,v
retrieving revision 1.96
diff -u -p -5 -r1.96 ecos.db
--- packages/ecos.db	14 May 2003 17:21:05 -0000	1.96
+++ packages/ecos.db	5 Jun 2003 13:16:33 -0000
@@ -520,10 +520,20 @@ package CYGPKG_DEVS_FLASH_GRG {
         description "
            This package contains hardware support for FLASH memory
 	   on the Intel Generic Residential Gateway platform."
 }
 
+package CYGPKG_DEVS_FLASH_PRPMC1100 {
+	alias 		{ "FLASH memory support for PrPMC1100" flash_prpmc1100 }
+	directory	devs/flash/arm/prpmc1100
+	script		flash_prpmc1100.cdl
+	hardware
+        description "
+           This package contains hardware support for FLASH memory
+	   on the Motorola PrPMC1100 platform."
+}
+
 package CYGPKG_DEVS_FLASH_ARM_INTEGRATOR {
         alias           { "FLASH memory support for ARM INTEGRATOR" flash_integrator }
         directory       devs/flash/arm/integrator
         script          flash_integrator.cdl
         hardware
@@ -2382,10 +2392,20 @@ package CYGPKG_HAL_ARM_XSCALE_GRG {
         description "
         The GRG HAL package provides the support needed to run eCos on an
         Intel Generic Residential Gateway evaluation board."
 }
 
+package CYGPKG_HAL_ARM_XSCALE_PRPMC1100 {
+	alias		{ "Motorola PrPMC1100 PMC for Intel XScale IXC1100" hal_arm_xscale_prpmc1100 }
+	directory	hal/arm/xscale/prpmc1100
+	script		hal_arm_xscale_prpmc1100.cdl
+	hardware
+        description "
+        The PrPMC1100 HAL package provides the support needed to run eCos on an
+        Motorola PrPMC1100 evaluation board."
+}
+
 package CYGPKG_HAL_ARM_XSCALE_PXA2X0 {
 	alias		{ "Intel PXA2X0" hal_arm_xscale_pxa2x0 }
 	directory	hal/arm/xscale/pxa2x0
 	script		hal_arm_xscale_pxa2x0.cdl
 	hardware
@@ -3824,10 +3844,25 @@ target grg {
 		   CYGPKG_DEVS_FLASH_GRG
         }
         description "
         The grg target provides the packages needed to run
         eCos on an Intel Generic Residential Gateway board."
+}
+
+target prpmc1100 {
+	alias { "Motorola PrPMC1100" prpmc1100 }
+	packages { CYGPKG_HAL_ARM
+                   CYGPKG_HAL_ARM_XSCALE_CORE
+	           CYGPKG_HAL_ARM_XSCALE_IXP425
+                   CYGPKG_HAL_ARM_XSCALE_PRPMC1100
+		   CYGPKG_IO_PCI
+                   CYGPKG_DEVS_FLASH_STRATA
+		   CYGPKG_DEVS_FLASH_PRPMC1100
+        }
+        description "
+        The prpmc1100 target provides the packages needed to run
+        eCos on a Motorola PrPMC1100."
 }
 
 target edb7xxx {
         alias		{ "Cirrus Logic EDB7xxx development board" edb7211 eb7xxx eb7211 }
 	packages	{ CYGPKG_HAL_ARM
Index: packages/devs/flash/arm/prpmc1100/current/ChangeLog
===================================================================
RCS file: packages/devs/flash/arm/prpmc1100/current/ChangeLog
diff -N packages/devs/flash/arm/prpmc1100/current/ChangeLog
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/devs/flash/arm/prpmc1100/current/ChangeLog	5 Jun 2003 13:16:39 -0000
@@ -0,0 +1,35 @@
+
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
Index: packages/devs/flash/arm/prpmc1100/current/cdl/flash_prpmc1100.cdl
===================================================================
RCS file: packages/devs/flash/arm/prpmc1100/current/cdl/flash_prpmc1100.cdl
diff -N packages/devs/flash/arm/prpmc1100/current/cdl/flash_prpmc1100.cdl
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/devs/flash/arm/prpmc1100/current/cdl/flash_prpmc1100.cdl	5 Jun 2003 13:16:39 -0000
@@ -0,0 +1,78 @@
+# ====================================================================
+#
+#      flash_prpmc1100.cdl
+#
+#      FLASH memory - Hardware support on PRPMC1100 board
+#
+# ====================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+##
+## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+## at http://sources.redhat.com/ecos/ecos-license/
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+# ====================================================================
+######DESCRIPTIONBEGIN####
+#
+# Author(s):      
+# Original data:  msalter
+# Contributors:   
+# Date:           2002-12-11
+#
+#####DESCRIPTIONEND####
+#
+# ====================================================================
+
+cdl_package CYGPKG_DEVS_FLASH_PRPMC1100 {
+    display       "PRPMC1100 board FLASH memory support"
+
+    parent        CYGPKG_IO_FLASH
+    active_if     CYGPKG_IO_FLASH
+    requires      CYGPKG_HAL_ARM_XSCALE_PRPMC1100
+    requires      CYGPKG_DEVS_FLASH_STRATA
+
+    implements    CYGHWR_IO_FLASH_BLOCK_LOCKING
+
+    include_dir   cyg/io
+
+    # Arguably this should do in the generic package
+    # but then there is a logic loop so you can never enable it.
+    cdl_interface CYGINT_DEVS_FLASH_STRATA_REQUIRED {
+        display   "Generic StrataFLASH driver required"
+    }
+
+    implements    CYGINT_DEVS_FLASH_STRATA_REQUIRED
+
+    define_proc {
+        puts $::cdl_system_header "/***** prpmc1100 flash driver proc output start *****/"
+        puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_STRATA_INL <cyg/io/prpmc1100_strataflash.inl>"
+        puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_STRATA_CFG <pkgconf/devs_flash_prpmc1100.h>"
+        puts $::cdl_system_header "/*****  prpmc1100 flash driver proc output end  *****/"
+    }
+}
Index: packages/devs/flash/arm/prpmc1100/current/include/prpmc1100_strataflash.inl
===================================================================
RCS file: packages/devs/flash/arm/prpmc1100/current/include/prpmc1100_strataflash.inl
diff -N packages/devs/flash/arm/prpmc1100/current/include/prpmc1100_strataflash.inl
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/devs/flash/arm/prpmc1100/current/include/prpmc1100_strataflash.inl	5 Jun 2003 13:16:39 -0000
@@ -0,0 +1,67 @@
+#ifndef CYGONCE_DEVS_FLASH_PRPMC1100_STRATAFLASH_INL
+#define CYGONCE_DEVS_FLASH_PRPMC1100_STRATAFLASH_INL
+//==========================================================================
+//
+//      prpmc1100_strataflash.inl
+//
+//      Flash programming - device constants, etc.
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    gthomas, hmt
+// Contributors: gthomas
+// Date:         2001-02-24
+// Purpose:      
+// Description:  
+//              
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+// The prpmc1100 has one 16-bit device.
+// StrataFlash 28F128.
+
+#define CYGNUM_FLASH_DEVICES 	(1)
+#define CYGNUM_FLASH_BASE_MASK  (0xFF000000u) // 16Mb
+
+#define CYGNUM_FLASH_BASE 	(0x50000000u)
+#define CYGNUM_FLASH_WIDTH 	(16)
+#define CYGNUM_FLASH_BLANK      (1)
+
+#endif  // CYGONCE_DEVS_FLASH_PRPMC1100_STRATAFLASH_INL
+// ------------------------------------------------------------------------
+// EOF prpmc1100_strataflash.inl
Index: packages/hal/arm/xscale/prpmc1100/current/ChangeLog
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/ChangeLog
diff -N packages/hal/arm/xscale/prpmc1100/current/ChangeLog
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/ChangeLog	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,40 @@
+2003-04-06  Mark Salter  <msalter@redhat.com>
+
+	* src/prpmc1100_misc.c: Support serial EEPROM. Init GPIO.
+	* src/prpmc1100_pci.c: Support both monarch and non-monarch modes.
+	* include/prpmc1100.h: Add GPIO defines. Add CTL/STS register defines.
+
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
Index: packages/hal/arm/xscale/prpmc1100/current/cdl/hal_arm_xscale_prpmc1100.cdl
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/cdl/hal_arm_xscale_prpmc1100.cdl
diff -N packages/hal/arm/xscale/prpmc1100/current/cdl/hal_arm_xscale_prpmc1100.cdl
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/cdl/hal_arm_xscale_prpmc1100.cdl	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,301 @@
+# ====================================================================
+#
+#      hal_arm_xscale_prpmc1100.cdl
+#
+#      Motorola PrPMC1100 Board HAL package
+#
+# ====================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+##
+## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+## at http://sources.redhat.com/ecos/ecos-license/
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+# ====================================================================
+######DESCRIPTIONBEGIN####
+#
+# Author(s):      msalter
+# Contributors:   msalter
+# Date:           2003-03-27
+#
+#####DESCRIPTIONEND####
+#
+# ====================================================================
+cdl_package CYGPKG_HAL_ARM_XSCALE_PRPMC1100 {
+    display       "Motorola PrPMC1100 Processor PMC"
+    parent        CYGPKG_HAL_ARM_XSCALE
+    implements    CYGINT_HAL_ARM_BIGENDIAN
+    hardware
+    include_dir   cyg/hal
+    define_header hal_arm_xscale_prpmc1100.h
+    description   "
+        This HAL platform package provides support for the
+        Motorola PrPMC1100 for the Intel XScale IXC1100
+	Control Plane Processor."
+
+    compile       prpmc1100_misc.c prpmc1100_pci.c
+
+    define_proc {
+        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   <pkgconf/hal_arm.h>"
+        puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H  <pkgconf/hal_arm_xscale_ixp425.h>"
+        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_xscale_prpmc1100.h>"
+        puts $::cdl_header "#define CYGBLD_HAL_PLF_INTS_H <cyg/hal/hal_plf_ints.h>"
+	puts $::cdl_header "#define HAL_PLATFORM_CPU    \"XScale\""
+        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"Motorola PrPMC1100\""
+        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
+        puts $::cdl_header "#define HAL_PLATFORM_MACHINE_TYPE  290"
+    }
+
+    cdl_component CYG_HAL_STARTUP {
+        display       "Startup type"
+        flavor        data
+        default_value {"RAM"}
+        legal_values  {"RAM" "ROM"}
+	no_define
+	define -file system.h CYG_HAL_STARTUP
+        description   "
+           When targeting the PrPMC1100 board it is possible to configure the
+           system for either RAM bootstrap or ROM bootstrap(s). Select 'ram'
+	   when building programs to load into RAM using onboard debug software
+           such as RedBoot or eCos GDB stubs."
+    }
+
+    cdl_component CYGBLD_GLOBAL_OPTIONS {
+        display "Global build options"
+        flavor  none
+        no_define
+        description   "
+	    Global build options including control over compiler
+            flags, linker flags and choice of toolchain."
+
+        parent  CYGPKG_NONE
+
+        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
+            display "Global command prefix"
+            flavor  data
+            no_define
+            default_value { "arm-elf" }
+            description "
+                This option specifies the command prefix used when
+                invoking the build tools."
+        }
+
+        cdl_option CYGBLD_GLOBAL_CFLAGS {
+            display "Global compiler flags"
+            flavor  data
+            no_define
+            default_value { "-mcpu=xscale -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority -mapcs-frame" }
+            description   "
+                This option controls the global compiler flags which are used to
+                compile all packages by default. Individual packages may define
+                options which override these global flags."
+        }
+
+        cdl_option CYGBLD_GLOBAL_LDFLAGS {
+            display "Global linker flags"
+            flavor  data
+            no_define
+            default_value { "-mcpu=xscale -mbig-endian -Wl,--gc-sections -Wl,-static -g -O2 -nostdlib" }
+            description   "
+                This option controls the global linker flags. Individual
+                packages may define options which override these global flags."
+        }
+
+        cdl_option CYGBLD_BUILD_GDB_STUBS {
+            display "Build GDB stub ROM image"
+            default_value 0
+            requires { CYG_HAL_STARTUP == "ROM" }
+            requires CYGSEM_HAL_ROM_MONITOR
+            requires CYGBLD_BUILD_COMMON_GDB_STUBS
+            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
+            requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
+            requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
+            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
+            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
+            no_define
+            description "
+                This option enables the building of the GDB stubs for the
+                board. The common HAL controls takes care of most of the
+                build process, but the final conversion from ELF image to
+                binary data is handled by the platform CDL, allowing
+                relocation of the data if necessary."
+
+            make -priority 320 {
+                <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img
+                $(OBJCOPY) --remove-section=.fixed_vectors -O binary $< $@
+            }
+        }
+    }
+
+    cdl_component CYGPKG_HAL_ARM_XSCALE_PRPMC1100_OPTIONS {
+        display "Motorola PrPMC1100 build options"
+        flavor  none
+        no_define
+        description   "
+	    Package specific build options including control over
+	    compiler flags used only in building this package,
+	    and details of which tests are built."
+
+        cdl_option CYGPKG_HAL_ARM_XSCALE_PRPMC1100_CFLAGS_ADD {
+            display "Additional compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the XScale PRPMC1100 HAL. These flags are used in addition
+                to the set of global flags."
+        }
+
+        cdl_option CYGPKG_HAL_ARM_XSCALE_PRPMC1100_CFLAGS_REMOVE {
+            display "Suppressed compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the XScale PRPMC1100 HAL. These flags are removed from
+                the set of global flags if present."
+        }
+
+	cdl_option CYGNUM_HAL_BREAKPOINT_LIST_SIZE {
+            display       "Number of breakpoints supported by the HAL."
+            flavor        data
+            default_value 32
+            description   "
+                This option determines the number of breakpoints supported by the HAL."
+        }
+    }
+
+    cdl_option CYGSEM_HAL_IXP425_PLF_USES_UART1 {
+        display       "PRPMC1100 uses IXP425 high-speed UART"
+        flavor        bool
+        default_value 1
+        description   "
+            Enable this option if the IXP425 high-speed UART is used
+            as a virtual vector communications channel."
+    }
+
+    cdl_option CYGSEM_HAL_IXP425_PLF_USES_UART2 {
+        display       "PRPMC1100 uses IXP425 console UART"
+        flavor        bool
+        default_value 1
+        description   "
+            Enable this option if the IXP425 console UART is to be used
+	    as a virtual vector communications channel."
+    }
+
+    cdl_component CYGHWR_MEMORY_LAYOUT {
+        display "Memory layout"
+        flavor data
+        no_define
+        calculated { CYG_HAL_STARTUP == "RAM" ? "arm_xscale_prpmc1100_ram" : \
+	                                        "arm_xscale_prpmc1100_rom" }
+
+        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
+            display "Memory layout linker script fragment"
+            flavor data
+            no_define
+            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
+            calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_arm_xscale_prpmc1100_ram.ldi>" : \
+						    "<pkgconf/mlt_arm_xscale_prpmc1100_rom.ldi>" }
+        }
+
+        cdl_option CYGHWR_MEMORY_LAYOUT_H {
+            display "Memory layout header file"
+            flavor data
+            no_define
+            define -file system.h CYGHWR_MEMORY_LAYOUT_H
+            calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_arm_xscale_prpmc1100_ram.h>" : \
+                                                    "<pkgconf/mlt_arm_xscale_prpmc1100_rom.h>" }
+        }
+    }
+
+    cdl_option CYGSEM_HAL_ROM_MONITOR {
+        display       "Behave as a ROM monitor"
+        flavor        bool
+        default_value 0
+        parent        CYGPKG_HAL_ROM_MONITOR
+        requires      { CYG_HAL_STARTUP == "ROM" }
+        description   "
+            Enable this option if this program is to be used as a ROM monitor,
+            i.e. applications will be loaded into RAM on the board, and this
+            ROM monitor may process exceptions or interrupts generated from the
+            application. This enables features such as utilizing a separate
+            interrupt stack when exceptions are generated."
+    }
+
+    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
+         display       "Work with a ROM monitor"
+         flavor        booldata
+         legal_values  { "Generic" "GDB_stubs" }
+         default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
+         parent        CYGPKG_HAL_ROM_MONITOR
+         requires      { CYG_HAL_STARTUP == "RAM" }
+         description   "
+             Support can be enabled for different varieties of ROM monitor.
+             This support changes various eCos semantics such as the encoding
+             of diagnostic output, or the overriding of hardware interrupt
+             vectors.
+             Firstly there is \"Generic\" support which prevents the HAL
+             from overriding the hardware vectors that it does not use, to
+             instead allow an installed ROM monitor to handle them. This is
+             the most basic support which is likely to be common to most
+             implementations of ROM monitor.
+             \"GDB_stubs\" provides support when GDB stubs are included in
+             the ROM monitor or boot ROM."
+     }
+
+    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
+        display       "Redboot HAL options"
+        flavor        none
+        no_define
+        parent        CYGPKG_REDBOOT
+        active_if     CYGPKG_REDBOOT
+        description   "
+            This option lists the target's requirements for a valid Redboot
+            configuration."
+
+        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
+            display       "Build Redboot ROM binary image"
+            active_if     CYGBLD_BUILD_REDBOOT
+            default_value 1
+            no_define
+            description "This option enables the conversion of the Redboot ELF
+                         image to a binary image suitable for ROM programming."
+
+            make -priority 325 {
+                <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf
+                $(OBJCOPY) --strip-debug $< $(@:.bin=.img) 
+                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
+                $(OBJCOPY) -O binary $< $@
+            }
+        }
+    }
+}
Index: packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_extras.h
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_extras.h
diff -N packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_extras.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_extras.h	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,223 @@
+#ifndef CYGONCE_HAL_PLATFORM_EXTRAS_H
+#define CYGONCE_HAL_PLATFORM_EXTRAS_H
+
+/*=============================================================================
+//
+//      hal_platform_extras.h
+//
+//      Platform specific MMU table.
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2002-12-08
+// Purpose:      Intel XScale Generic Residential Platform specific mmu table
+// Description: 
+// Usage:        #include <cyg/hal/hal_platform_extras.h>
+//     Only used by "vectors.S"         
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
+#if defined(CYG_HAL_STARTUP_ROMRAM)
+        .section .text
+	.ltorg
+	.p2align 13
+#else
+        .section .mmu_tables, "a"
+#endif
+
+    mmu_table:
+        //  This page table sets up the preferred mapping:
+        //
+        //  Virtual Address   Physical Address  XCB  Size (MB)  Description
+        //  ---------------   ----------------  ---  ---------  -----------
+        //     0x00000000       0x00000000      010      32     SDRAM (cached)
+        //     0x10000000       0x10000000      000      32     SDRAM (alias)
+        //     0x20000000       0x00000000      000      32     SDRAM (uncached)
+        //     0x48000000       0x48000000      000      64     PCI Data
+        //     0x50000000       0x50000000      010      16     Flash (CS0)
+        //     0x51000000       0x51000000      000     112     CS1 - CS7
+	//     0x60000000       0x60000000      000      64     Queue Manager
+	//     0xC0000000       0xC0000000      000       1     PCI Controller
+	//     0xC4000000       0xC4000000      000       1     Exp. Bus Config
+	//     0xC8000000       0xC8000000      000       1     Misc IXP425 IO
+	//     0xCC000000       0xCC000000      000       1     SDRAM Config
+
+	// 32MB SDRAM
+	.set	__base,0x000
+	.rept	0x020 - 0x000
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+
+	// 224MB Unused
+	.rept	0x100 - 0x020
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 32MB SDRAM Alias
+	.rept	0x120 - 0x100
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+
+	// 224MB Unused
+	.rept	0x200 - 0x120
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 32MB SDRAM (uncached)
+	.set	__base,0x000
+	.rept	0x220 - 0x200
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 224MB Unused
+	.set	__base,0x220
+	.rept	0x300 - 0x220
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 384MB Unused
+	.rept	0x480 - 0x300
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB PCI Data
+	.rept	0x4C0 - 0x480
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB Unused
+	.rept	0x500 - 0x4C0
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 16MB Flash  (Expansion bus CS0)
+	.rept	0x510 - 0x500
+	FL_SECTION_ENTRY __base,0,3,0,0,1,0
+	.set	__base,__base+1
+	.endr
+
+	// Rest of Expansion bus (CS1-CS7)
+	.rept	0x600 - 0x510
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 64MB Queue Manager
+	.rept	0x640 - 0x600
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 1472MB Unused
+	.rept	0xC00 - 0x640
+	.word 0
+	.set	__base,__base+1
+	.endr
+  
+	// 1MB PCI Controller
+	.rept	0xC01 - 0xC00
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xC40 - 0xC01
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 1MB Expansion bus config
+	.rept	0xC41 - 0xC40
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xC80 - 0xC41
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 1MB Misc IO
+	.rept	0xC81 - 0xC80
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xCC0 - 0xC81
+	.word 0
+	.set	__base,__base+1
+	.endr
+
+	// 1MB SDRAM Config
+	.rept	0xCC1 - 0xCC0
+	FL_SECTION_ENTRY __base,0,3,0,0,0,0
+	.set	__base,__base+1
+	.endr
+
+	// 63MB Unused
+	.rept	0xD00 - 0xCC1
+	.word 0
+	.set	__base,__base+1
+	.endr
+                  
+	// Rest is Unused
+	.rept	0x1000 - 0xD00
+        .word 0
+	.set	__base,__base+1
+	.endr
+
+#endif /* defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) */
+
+/*---------------------------------------------------------------------------*/
+/* end of hal_platform_extras.h                                              */
+#endif /* CYGONCE_HAL_PLATFORM_EXTRAS_H */
Index: packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_setup.h
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_setup.h
diff -N packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_setup.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/hal_platform_setup.h	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,316 @@
+#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
+#define CYGONCE_HAL_PLATFORM_SETUP_H
+
+/*=============================================================================
+//
+//      hal_platform_setup.h
+//
+//      Platform specific support for HAL (assembly code)
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-03-27
+// Purpose:      Motorola PRPMC1100 specific support routines
+// Description: 
+// Usage:        #include <cyg/hal/hal_platform_setup.h>
+//     Only used by "vectors.S"         
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+#include <pkgconf/system.h>             // System-wide configuration info
+#include CYGBLD_HAL_VARIANT_H           // Variant specific configuration
+#include CYGBLD_HAL_PLATFORM_H          // Platform specific configuration
+#include <cyg/hal/hal_ixp425.h>         // Variant specific hardware definitions
+#include <cyg/hal/hal_mmu.h>            // MMU definitions
+#include <cyg/hal/hal_mm.h>             // more MMU definitions
+#include <cyg/hal/prpmc1100.h>          // Platform specific hardware definitions
+
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
+#define PLATFORM_SETUP1  _platform_setup1
+#define PLATFORM_EXTRAS  <cyg/hal/hal_platform_extras.h>
+#define CYGHWR_HAL_ARM_HAS_MMU
+
+// ------------------------------------------------------------------------
+// Define macro used to diddle the LEDs during early initialization.
+// Can use r0+r1.  Argument in \x.
+#define CYGHWR_LED_MACRO
+
+// Delay a bit
+.macro DELAY cycles, reg0
+#if 0
+    ldr     \reg0, =\cycles
+    subs    \reg0, \reg0, #1
+    subne   pc,  pc, #0xc
+#endif
+.endm
+
+// ------------------------------------------------------------------------
+// This macro represents the initial startup code for the platform        
+	.macro _platform_setup1
+
+#ifdef CYGINT_HAL_ARM_BIGENDIAN
+        // set big-endian
+	mrc	p15, 0, r0, c1, c0, 0
+        orr	r0, r0, #0x80
+	mcr	p15, 0, r0, c1, c0, 0
+        CPWAIT  r0
+#endif
+
+        ldr     r0,=(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
+        msr     cpsr, r0
+
+	// invalidate I & D caches & BTB
+	mcr	p15, 0, r0, c7, c7, 0
+	CPWAIT	r0
+
+	// invalidate I & Data TLB
+        mcr 	p15, 0, r0, c8, c7, 0
+        CPWAIT r0
+
+	// drain write and fill buffers
+	mcr	p15, 0, r0, c7, c10, 4
+	CPWAIT	r0
+
+	// disable write buffer coalescing
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #1
+	mcr	p15, 0, r0, c1, c0, 1
+	CPWAIT	r0
+		
+        // Setup chip selects
+        ldr     r1, =IXP425_EXP_CFG_BASE
+#ifdef IXP425_EXP_CS0_INIT
+	ldr	r0, =IXP425_EXP_CS0_INIT
+	str     r0, [r1, #IXP425_EXP_CS0]
+#endif
+#ifdef IXP425_EXP_CS1_INIT
+	ldr	r0, =IXP425_EXP_CS1_INIT
+	str     r0, [r1, #IXP425_EXP_CS1]
+#endif
+#ifdef IXP425_EXP_CS2_INIT
+	ldr	r0, =IXP425_EXP_CS2_INIT
+	str     r0, [r1, #IXP425_EXP_CS2]
+#endif
+#ifdef IXP425_EXP_CS3_INIT
+	ldr	r0, =IXP425_EXP_CS3_INIT
+	str     r0, [r1, #IXP425_EXP_CS3]
+#endif
+#ifdef IXP425_EXP_CS4_INIT
+	ldr	r0, =IXP425_EXP_CS4_INIT
+	str     r0, [r1, #IXP425_EXP_CS4]
+#endif
+#ifdef IXP425_EXP_CS5_INIT
+	ldr	r0, =IXP425_EXP_CS5_INIT
+	str     r0, [r1, #IXP425_EXP_CS5]
+#endif
+#ifdef IXP425_EXP_CS6_INIT
+	ldr	r0, =IXP425_EXP_CS6_INIT
+	str     r0, [r1, #IXP425_EXP_CS6]
+#endif
+#ifdef IXP425_EXP_CS7_INIT
+	ldr	r0, =IXP425_EXP_CS7_INIT
+	str     r0, [r1, #IXP425_EXP_CS7]
+#endif
+
+	// Enable the Icache
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #MMU_Control_I
+	mcr	p15, 0, r0, c1, c0, 0
+	CPWAIT  r0
+
+        // Setup SDRAM controller
+
+        ldr     r0, =IXP425_SDRAM_CFG_BASE
+
+	ldr 	r1, =IXP425_SDRAM_CONFIG_INIT
+	str     r1, [r0, #IXP425_SDRAM_CONFIG]
+
+	// disable refresh cycles
+	mov 	r1, #0
+	str	r1, [r0, #IXP425_SDRAM_REFRESH]
+
+	// send nop command
+	mov 	r1, #SDRAM_IR_NOP
+	str	r1, [r0, #IXP425_SDRAM_IR]
+        DELAY   0x10000, r1
+	
+	// set SDRAM internal refresh val
+	ldr	r1, =IXP425_SDRAM_REFRESH_CNT
+	str	r1, [r0, #IXP425_SDRAM_REFRESH]
+	DELAY   0x10000, r1
+
+	// send precharge-all command to close all open banks
+	mov     r1, #SDRAM_IR_PRECHARGE
+	str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x10000, r1
+
+	// provide 8 auto-refresh cycles
+	mov     r1, #SDRAM_IR_AUTO_REFRESH
+	mov     r2, #8
+  1:
+        str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x800, r3
+	subs	r2, r2, #1
+	bne	1b
+
+	// set mode register in sdram
+	mov	r1, #IXP425_SDRAM_SET_MODE_CMD
+        str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x10000, r1
+
+	// start normal operation
+	mov	r1, #SDRAM_IR_NORMAL
+        str	r1, [r0, #IXP425_SDRAM_IR]
+	DELAY   0x10000, r1
+
+#if defined(CYG_HAL_STARTUP_ROMRAM)
+        ldr     r0,=0x00000000
+        ldr     r1,=0x10000000
+        ldr     r2,=__bss_start
+  0:    ldr     r3,[r0],#4
+        str     r3,[r1],#4
+        cmp     r0,r2
+        bne     0b
+#endif
+                
+	// value to load into pc to jump to real runtime address
+	ldr     r0, =1f
+
+	// Setup EXP_CNFG0 value to switch EXP bus out of low memory
+	ldr 	r2, =IXP425_EXP_CFG_BASE
+	ldr     r1, [r2, #IXP425_EXP_CNFG0]
+	bic     r1, r1, #EXP_CNFG0_MEM_MAP
+
+	b       icache_boundary
+	.p2align 5
+icache_boundary:
+	// Here is where we switch from boot address (0x000000000) to the
+	// actual flash runtime address. We align to cache boundary so we
+        // execute from cache during the switchover. Cachelines are 8 words.
+        str     r1, [r2, #IXP425_EXP_CNFG0]    // make the EXP bus switch
+	nop
+        nop
+        nop
+        nop
+        mov     pc, r0
+        nop
+                            // display FFFF and loop forever.
+    0:  b       0b
+    1:
+
+#if defined(CYG_HAL_STARTUP_ROM)
+	// Move mmu tables into RAM so page table walks by the cpu
+	// don't interfere with FLASH programming.
+	ldr	r0, =mmu_table
+	add     r2, r0, #0x4000     	// End of tables
+	mov	r1, #SDRAM_PHYS_BASE
+	orr	r1, r1, #0x4000		// RAM tables
+
+	// everything can go as-is
+    1:
+	ldr	r3, [r0], #4
+	str	r3, [r1], #4
+	cmp	r0, r2
+	bne	1b
+#endif
+
+        mcr     p15, 0, r0, c7, c10, 4  // drain the write & fill buffers
+        CPWAIT  r0
+
+	// Set the TTB register to DRAM mmu_table
+	ldr	r0, =(SDRAM_PHYS_BASE | 0x4000) // RAM tables
+	mcr	p15, 0, r0, c2, c0, 0		// load page table pointer
+	CPWAIT  r0
+
+        // enable permission checks in all domains
+        ldr     r0, =0x55555555
+        mcr     p15, 0, r0, c3, c0, 0
+        CPWAIT  r0
+
+        // enable mmu
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #MMU_Control_M
+	orr	r0, r0, #MMU_Control_R
+	mcr	p15, 0, r0, c1, c0, 0
+	CPWAIT	r0
+
+        // enable D cache
+        mrc     p15, 0, r0, c1, c0, 0
+        orr     r0, r0, #MMU_Control_C
+        mcr     p15, 0, r0, c1, c0, 0
+        CPWAIT  r0
+
+        // Enable branch target buffer
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #MMU_Control_BTB
+	mcr	p15, 0, r0, c1, c0, 0
+	CPWAIT  r0
+
+        mcr     p15, 0, r0, c7, c10, 4  // drain the write & fill buffers
+        CPWAIT  r0
+
+        mcr     p15, 0, r0, c7, c7, 0   // flush Icache, Dcache and BTB
+        CPWAIT  r0
+
+        mcr     p15, 0, r0, c8, c7, 0   // flush instuction and data TLBs
+        CPWAIT  r0
+
+	mcr	p15, 0, r0, c7, c10, 4	// drain the write & fill buffers
+	CPWAIT r0	
+	
+        // save SDRAM size
+        ldr     r1, =hal_dram_size  /* [see hal_intr.h] */
+        mov     r8, #SDRAM_SIZE
+        str     r8, [r1]
+
+	.endm    // _platform_setup1
+
+#else // defined(CYG_HAL_STARTUP_ROM)
+#define PLATFORM_SETUP1
+#endif
+
+#define PLATFORM_VECTORS         _platform_vectors
+        .macro  _platform_vectors
+        .endm                                        
+
+/*---------------------------------------------------------------------------*/
+/* end of hal_platform_setup.h                                               */
+#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
Index: packages/hal/arm/xscale/prpmc1100/current/include/hal_plf_ints.h
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/hal_plf_ints.h
diff -N packages/hal/arm/xscale/prpmc1100/current/include/hal_plf_ints.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/hal_plf_ints.h	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,78 @@
+#ifndef CYGONCE_HAL_PLF_INTS_H
+#define CYGONCE_HAL_PLF_INTS_H
+//==========================================================================
+//
+//      hal_plf_ints.h
+//
+//      HAL Platform Interrupt support
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2002-07-15
+// Purpose:      Define Interrupt support
+// Description:  The interrupt details for a specific platform is defined here.
+// Usage:
+//              
+//
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+// start with variant ints
+#include CYGBLD_HAL_VAR_INTS_H
+
+// NB: Commented out because of errata on reset function of watchdog timer
+//
+#if 0
+#define HAL_PLATFORM_RESET()                                          \
+    CYG_MACRO_START                                                   \
+    cyg_uint32 __ctrl;                                                \
+    /* By disabling interupts we will just hang in the loop below */  \
+    /* if for some reason the software reset fails.               */  \
+    HAL_DISABLE_INTERRUPTS(__ctrl);                                   \
+    *IXP425_OST_WDOG_KEY = 0x482e;                                    \
+    *IXP425_OST_WDOG = 10;                                            \
+    *IXP425_OST_WDOG_ENA = 5;                                         \
+    for(;;); /* hang here forever if reset fails */                   \
+    CYG_MACRO_END
+#else
+#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT
+#endif
+
+#endif // CYGONCE_HAL_PLF_INTS_H
Index: packages/hal/arm/xscale/prpmc1100/current/include/plf_io.h
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/plf_io.h
diff -N packages/hal/arm/xscale/prpmc1100/current/include/plf_io.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/plf_io.h	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,64 @@
+#ifndef CYGONCE_PLF_IO_H
+#define CYGONCE_PLF_IO_H
+
+//=============================================================================
+//
+//      plf_io.h
+//
+//      Platform specific IO support
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-03-27
+// Purpose:      Motorola PrPMC1100 IO support macros
+// Description: 
+// Usage:        #include <cyg/hal/plf_io.h>
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include <pkgconf/hal.h>
+#include <cyg/hal/hal_io.h>             // IO macros
+#include <cyg/hal/prpmc1100.h>
+#include CYGBLD_HAL_PLF_INTS_H
+
+//-----------------------------------------------------------------------------
+// end of plf_io.h
+#endif // CYGONCE_PLF_IO_H
Index: packages/hal/arm/xscale/prpmc1100/current/include/prpmc1100.h
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/prpmc1100.h
diff -N packages/hal/arm/xscale/prpmc1100/current/include/prpmc1100.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/prpmc1100.h	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,118 @@
+#ifndef CYGONCE_HAL_ARM_XSCALE_PRPMC1100_PRPMC1100_H
+#define CYGONCE_HAL_ARM_XSCALE_PRPMC1100_PRPMC1100_H
+
+/*=============================================================================
+//
+//      prpmc1100.h
+//
+//      Platform specific support (register layout, etc)
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-03-27
+// Purpose:      Intel PRPMC1100 specific support routines
+// Description: 
+// Usage:        #include <cyg/hal/prpmc1100.h>
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+#include <pkgconf/system.h>
+#include CYGHWR_MEMORY_LAYOUT_H
+#include <pkgconf/hal_arm_xscale_prpmc1100.h>
+#include <cyg/hal/hal_ixp425.h>
+
+// These must match setup in the page table in hal_platform_extras.h
+#define SDRAM_PHYS_BASE                    0x00000000
+#define SDRAM_BASE                         0x00000000
+#define SDRAM_UNCACHED_BASE                0x10000000
+#define SDRAM_SIZE                         0x02000000  // 32MB
+
+// CS0 (flash optimum timing)
+#define IXP425_EXP_CS0_INIT \
+ (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+  EXP_RECOVERY_T(15) | EXP_SZ_16M | EXP_WR_EN | EXP_BYTE_RD16 | EXP_CS_EN)
+
+#if 0
+#define IXP425_EXP_CS7_INIT \
+ (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+  EXP_RECOVERY_T(15) | EXP_SZ_512 | EXP_WR_EN | EXP_CS_EN)
+#endif
+
+#define IXP425_SDRAM_CONFIG_INIT  (SDRAM_CONFIG_CAS_3 | SDRAM_CONFIG_4x32Mx16)
+#define IXP425_SDRAM_REFRESH_CNT  0x081
+#define IXP425_SDRAM_SET_MODE_CMD SDRAM_IR_MODE_SET_CAS3
+
+// control register
+#define PRPMC_CTL_REG        REG16(0, 0x57000000)
+#define PRPMC_CTL_EREADY     1
+#define PRPMC_CTL_RESETOUT   2
+#define PRPMC_CTL_INTN_GPIO  4
+
+// status register
+#define PRPMC_STS_REG        REG16(0, 0x57000002)
+#define PRPMC_STS_RUN_LED    1
+#define PRPMC_STS_FAIL_LED   2
+
+// ------------------------------------------------------------------------
+// GPIO lines
+
+// lines used for 2-wire interface to EEPROM
+#define GPIO_EEPROM_SCL 6
+#define GPIO_EEPROM_SDA 7
+
+
+// ------------------------------------------------------------------------
+// No Hex Display
+//
+#ifdef __ASSEMBLER__
+        // Display hex digits in 'value' not masked by 'mask'.
+	.macro DISPLAY value, reg0, reg1
+	.endm
+#else
+static inline void HEX_DISPLAY(int value)
+{
+}
+#endif // __ASSEMBLER__
+
+// ------------------------------------------------------------------------
+
+#endif // CYGONCE_HAL_ARM_XSCALE_PRPMC1100_PRPMC1100_H
+// EOF prpmc1100.h
Index: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.h
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.h
diff -N packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.h	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,18 @@
+// eCos memory layout - Fri Oct 20 05:56:24 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0)
+#define CYGMEM_REGION_ram_SIZE (0x02000000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x02000000 - (size_t) CYG_LABEL_NAME (__heap1))
+
Index: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.ldi
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.ldi
diff -N packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.ldi
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.ldi	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,27 @@
+// eCos memory layout - Fri Oct 20 05:56:24 2000
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+    ram : ORIGIN = 0, LENGTH = 0x02000000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
+    SECTION_rom_vectors (ram, 0x20000, LMA_EQ_VMA)
+    SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
Index: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.mlt
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.mlt
diff -N packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.mlt
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_ram.mlt	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,14 @@
+version 0
+region ram 0 02000000 0 !
+section fixed_vectors 0 1 0 1 1 0 1 0 20 20 !
+section rom_vectors 0 1 0 1 1 1 1 1 20000 20000 text text !
+section text 0 4 0 1 0 1 0 1 fini fini !
+section fini 0 4 0 1 0 1 0 1 rodata rodata !
+section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !
+section rodata1 0 4 0 1 0 1 0 1 fixup fixup !
+section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
+section gcc_except_table 0 4 0 1 0 1 0 1 data data !
+section data 0 4 0 1 0 1 0 1 bss bss !
+section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
+section heap1 0 8 0 0 0 0 0 0 !
+
Index: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.h
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.h
diff -N packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.h	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,20 @@
+// eCos memory layout - Tue Jul 02 10:03:04 2002
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0)
+#define CYGMEM_REGION_ram_SIZE (0x02000000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0x50000000)
+#define CYGMEM_REGION_rom_SIZE (0x40000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x02000000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.ldi
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.ldi
diff -N packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.ldi
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.ldi	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,29 @@
+// eCos memory layout - Tue Jul 02 10:03:04 2002
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+    ram : ORIGIN = 0, LENGTH = 0x02000000
+    rom : ORIGIN = 0x50000000, LENGTH = 0x40000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_rom_vectors (rom, 0x50000000, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_mmu_tables (rom, ALIGN (0x4000), LMA_EQ_VMA)
+    SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
+    SECTION_data (ram, 0x8000, FOLLOWING (.mmu_tables))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
Index: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.mlt
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.mlt
diff -N packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.mlt
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/include/pkgconf/mlt_arm_xscale_prpmc1100_rom.mlt	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,15 @@
+version 0
+region ram 0 02000000 0 !
+region rom 50000000 40000 1 !
+section fixed_vectors 0 1 0 1 1 0 1 0 20 20 !
+section data 0 1 1 1 1 1 0 0 8000 bss !
+section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
+section heap1 0 8 0 0 0 0 0 0 !
+section rom_vectors 0 1 0 1 1 1 1 1 50000000 50000000 text text !
+section text 0 4 0 1 0 1 0 1 fini fini !
+section fini 0 4 0 1 0 1 0 1 rodata rodata !
+section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !
+section rodata1 0 4 0 1 0 1 0 1 fixup fixup !
+section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
+section gcc_except_table 0 4 0 1 0 1 0 1 mmu_tables mmu_tables !
+section mmu_tables 0 4000 0 1 0 0 0 1 data !
Index: packages/hal/arm/xscale/prpmc1100/current/misc/redboot_RAM.ecm
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/misc/redboot_RAM.ecm
diff -N packages/hal/arm/xscale/prpmc1100/current/misc/redboot_RAM.ecm
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/misc/redboot_RAM.ecm	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,117 @@
+cdl_savefile_version 1;
+cdl_savefile_command cdl_savefile_version {};
+cdl_savefile_command cdl_savefile_command {};
+cdl_savefile_command cdl_configuration { description hardware template package };
+cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
+
+cdl_configuration eCos {
+    description "" ;
+    hardware    prpmc1100 ;
+    template    redboot ;
+    package -hardware CYGPKG_HAL_ARM current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_CORE current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_IXP425 current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_PRPMC1100 current ;
+    package -hardware CYGPKG_DEVS_FLASH_STRATA current ;
+    package -hardware CYGPKG_DEVS_FLASH_PRPMC1100 current ;
+    package -template CYGPKG_HAL current ;
+    package -template CYGPKG_INFRA current ;
+    package -template CYGPKG_REDBOOT current ;
+    package -template CYGPKG_ISOINFRA current ;
+    package -template CYGPKG_LIBC_STRING current ;
+    package CYGPKG_IO_FLASH current ;
+    package CYGPKG_IO_ETH_DRIVERS current ;
+    package CYGPKG_MEMALLOC current ;
+    package CYGPKG_COMPRESS_ZLIB current ;
+};
+
+cdl_component CYG_HAL_STARTUP {
+    user_value RAM
+};
+
+cdl_option CYGBLD_BUILD_GDB_STUBS {
+    user_value 0
+};
+
+cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS {
+    inferred_value 0
+};
+
+cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE {
+    user_value 4096
+};
+
+cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
+    user_value 0
+};
+
+cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
+    inferred_value 0
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
+    inferred_value 1
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT {
+    inferred_value 0
+};
+
+cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
+    inferred_value 0 0
+};
+
+cdl_component CYGBLD_BUILD_REDBOOT {
+    user_value 1
+};
+
+cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE {
+    inferred_value 0x40000
+};
+
+cdl_component CYGSEM_REDBOOT_FLASH_CONFIG {
+    user_value 1
+};
+
+cdl_component CYGSEM_REDBOOT_BSP_SYSCALLS {
+    inferred_value 1
+};
+
+cdl_option CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT {
+    inferred_value 0x600000
+};
+
+cdl_option CYGHWR_HAL_IXP425_PCI_NP_WORKAROUND {
+    inferred_value 1
+};
+
+cdl_option CYGBLD_ISO_STRTOK_R_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/bsdstring.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGPKG_HAL_GDB_FILEIO {
+    user_value 1
+};
+
+cdl_option CYGOPT_DEVS_FLASH_STRATA_NOT_IN_RAM {
+   inferred_value 0
+};
Index: packages/hal/arm/xscale/prpmc1100/current/misc/redboot_ROM.ecm
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/misc/redboot_ROM.ecm
diff -N packages/hal/arm/xscale/prpmc1100/current/misc/redboot_ROM.ecm
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/misc/redboot_ROM.ecm	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,121 @@
+cdl_savefile_version 1;
+cdl_savefile_command cdl_savefile_version {};
+cdl_savefile_command cdl_savefile_command {};
+cdl_savefile_command cdl_configuration { description hardware template package };
+cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
+
+cdl_configuration eCos {
+    description "" ;
+    hardware    prpmc1100 ;
+    template    redboot ;
+    package -hardware CYGPKG_HAL_ARM current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_CORE current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_IXP425 current ;
+    package -hardware CYGPKG_HAL_ARM_XSCALE_PRPMC1100 current ;
+    package -hardware CYGPKG_DEVS_FLASH_STRATA current ;
+    package -hardware CYGPKG_DEVS_FLASH_PRPMC1100 current ;
+    package -template CYGPKG_HAL current ;
+    package -template CYGPKG_INFRA current ;
+    package -template CYGPKG_REDBOOT current ;
+    package -template CYGPKG_ISOINFRA current ;
+    package -template CYGPKG_LIBC_STRING current ;
+    package CYGPKG_IO_FLASH current ;
+    package CYGPKG_IO_ETH_DRIVERS current ;
+    package CYGPKG_MEMALLOC current ;
+    package CYGPKG_COMPRESS_ZLIB current ;
+};
+
+cdl_component CYG_HAL_STARTUP {
+    user_value ROM
+};
+
+cdl_option CYGBLD_BUILD_GDB_STUBS {
+    user_value 0
+};
+
+cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS {
+    inferred_value 0
+};
+
+cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE {
+    user_value 4096
+};
+
+cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
+    user_value 0
+};
+
+cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
+    inferred_value 0
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
+    inferred_value 1
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT {
+    inferred_value 0
+};
+
+cdl_option CYGSEM_HAL_ROM_MONITOR {
+    user_value 1
+};
+
+cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
+    inferred_value 0 0
+};
+
+cdl_component CYGBLD_BUILD_REDBOOT {
+    user_value 1
+};
+
+cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE {
+    inferred_value 0x40000
+};
+
+cdl_component CYGSEM_REDBOOT_FLASH_CONFIG {
+    user_value 1
+};
+
+cdl_component CYGSEM_REDBOOT_BSP_SYSCALLS {
+   inferred_value 1
+};
+
+cdl_option CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT {
+    inferred_value 0x600000
+};
+
+cdl_option CYGHWR_HAL_IXP425_PCI_NP_WORKAROUND {
+    inferred_value 1
+};
+
+cdl_option CYGBLD_ISO_STRTOK_R_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/bsdstring.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER {
+    inferred_value 1 <cyg/libc/string/string.h>
+};
+
+cdl_option CYGBLD_ISO_DNS_HEADER {
+    inferred_value 1 <cyg/ns/dns/dns.h>
+};
+
+cdl_option CYGPKG_HAL_GDB_FILEIO {
+    user_value 1
+};
Index: packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_misc.c
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_misc.c
diff -N packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_misc.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_misc.c	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,397 @@
+//==========================================================================
+//
+//      prpmc1100_misc.c
+//
+//      HAL misc board support code for Intel XScale PRPMC1100
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-03-27
+// Purpose:      HAL board support
+// Description:  Implementations of HAL board interfaces
+//
+//####DESCRIPTIONEND####
+//
+//========================================================================*/
+
+#include <pkgconf/hal.h>
+#include <pkgconf/system.h>
+#include CYGBLD_HAL_PLATFORM_H
+
+#include <cyg/infra/cyg_type.h>     // base types
+#include <cyg/infra/cyg_trac.h>     // tracing macros
+#include <cyg/infra/cyg_ass.h>      // assertion macros
+
+#include <cyg/hal/hal_io.h>         // IO macros
+#include <cyg/hal/hal_arch.h>       // Register state info
+#include <cyg/hal/hal_diag.h>
+#include <cyg/hal/hal_intr.h>       // Interrupt names
+#include <cyg/hal/hal_cache.h>
+#include <cyg/hal/hal_ixp425.h>     // Hardware definitions
+#include <cyg/hal/prpmc1100.h>      // Platform specifics
+
+#include <cyg/infra/diag.h>         // diag_printf
+
+//
+// Platform specific initialization
+//
+void
+plf_hardware_init(void)
+{
+    int  is_host = (*IXP425_PCI_CSR & PCI_CSR_HOST);
+
+    *IXP425_EXP_CS7 = (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+		       EXP_RECOVERY_T(15) | EXP_SZ_512 | EXP_WR_EN | EXP_CS_EN);
+
+    *IXP425_EXP_CS4 = (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+		       EXP_RECOVERY_T(15) | EXP_SZ_512 | EXP_WR_EN | EXP_CS_EN);
+    *IXP425_EXP_CS5 = (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+		       EXP_RECOVERY_T(15) | EXP_SZ_512 | EXP_WR_EN | EXP_CS_EN);
+
+    // pull down EREADY if non-monarch mode.
+    if (!is_host)
+	*PRPMC_CTL_REG = PRPMC_CTL_RESETOUT | PRPMC_CTL_INTN_GPIO;
+
+    HAL_GPIO_OUTPUT_CLEAR(GPIO_EEPROM_SCL);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_EEPROM_SCL);
+
+    HAL_GPIO_OUTPUT_SET(GPIO_EEPROM_SDA);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_EEPROM_SDA);
+
+#ifdef CYGPKG_IO_PCI
+    extern void hal_plf_pci_init(void);
+    hal_plf_pci_init();
+#endif
+}
+
+// ----------------------------------------------------------------------------
+// EEPROM Support 
+//
+#ifdef CYGPKG_DEVS_ETH_INTEL_NPE
+
+#define CLK_LO()      HAL_GPIO_OUTPUT_CLEAR(GPIO_EEPROM_SCL)
+#define CLK_HI()      HAL_GPIO_OUTPUT_SET(GPIO_EEPROM_SCL)
+
+#define DATA_LO()     HAL_GPIO_OUTPUT_CLEAR(GPIO_EEPROM_SDA)
+#define DATA_HI()     HAL_GPIO_OUTPUT_SET(GPIO_EEPROM_SDA)
+
+
+// returns non-zero if ACK bit seen
+static int
+eeprom_start(cyg_uint8 b)
+{
+    int i;
+
+    CLK_HI();
+    hal_delay_us(5);
+    DATA_LO();
+    hal_delay_us(5);
+    CLK_LO();
+
+    for (i = 7; i >= 0; i--) {
+	if (b & (1 << i))
+	    DATA_HI();
+	else
+	    DATA_LO();
+	hal_delay_us(5);
+	CLK_HI();
+	hal_delay_us(5);
+	CLK_LO();
+    }
+    hal_delay_us(5);
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_EEPROM_SDA);
+    CLK_HI();
+    hal_delay_us(5);
+    i = (*IXP425_GPINR & (1 << GPIO_EEPROM_SDA)) ? 0 : 1;
+    CLK_LO();
+    hal_delay_us(5);
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_EEPROM_SDA);
+
+    return i;
+}
+
+
+static void
+eeprom_stop(void)
+{
+    int i;
+    
+    hal_delay_us(5);
+    DATA_LO();
+    hal_delay_us(5);
+    CLK_HI();
+    hal_delay_us(5);
+    DATA_HI();
+    hal_delay_us(5);
+    CLK_LO();
+    hal_delay_us(5);
+}
+
+
+static int
+eeprom_putb(cyg_uint8 b)
+{
+    int i;
+
+    for (i = 7; i >= 0; i--) {
+	if (b & (1 << i))
+	    DATA_HI();
+	else
+	    DATA_LO();
+	CLK_HI();
+	hal_delay_us(5);
+	CLK_LO();
+	hal_delay_us(5);
+    }
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_EEPROM_SDA);
+    CLK_HI();
+    hal_delay_us(5);
+    i = (*IXP425_GPINR & (1 << GPIO_EEPROM_SDA)) ? 0 : 1;
+    CLK_LO();
+    hal_delay_us(5);
+
+    DATA_HI();
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_EEPROM_SDA);
+
+    return i;
+}
+
+
+static cyg_uint8
+eeprom_getb(int more)
+{
+    int i;
+    cyg_uint8 b = 0;
+
+    HAL_GPIO_OUTPUT_DISABLE(GPIO_EEPROM_SDA);
+    hal_delay_us(5);
+
+    for (i = 7; i >= 0; i--) {
+	b <<= 1;
+	if (*IXP425_GPINR & (1 << GPIO_EEPROM_SDA))
+	    b |= 1;
+	CLK_HI();
+	hal_delay_us(5);
+	CLK_LO();
+	hal_delay_us(5);
+    }
+    HAL_GPIO_OUTPUT_ENABLE(GPIO_EEPROM_SDA);
+    if (more)
+	DATA_LO();
+    else
+	DATA_HI();
+    hal_delay_us(5);
+    CLK_HI();
+    hal_delay_us(5);
+    CLK_LO();
+    hal_delay_us(5);
+
+    return b;
+}
+
+
+static int
+eeprom_read(int addr, cyg_uint8 *buf, int nbytes)
+{
+    cyg_uint8 start_byte;
+    int i;
+
+    start_byte = 0xA0;  // write
+
+    if (addr & (1 << 8))
+	start_byte |= 2;
+
+    
+    for (i = 0; i < 10; i++)
+	if (eeprom_start(start_byte))
+	    break;
+
+    if (i == 10) {
+	diag_printf("eeprom_read: Can't get write start ACK\n");
+	return 0;
+    }
+
+    if (!eeprom_putb(addr & 0xff)) {
+	diag_printf("eeprom_read: Can't get address ACK\n");
+	return 0;
+    }
+
+    start_byte |= 1; // READ command
+    if (!eeprom_start(start_byte)) {
+	diag_printf("eeprom_read: Can't get read start ACK\n");
+	return 0;
+    }
+
+    for (i = 0; i < (nbytes - 1); i++)
+	*buf++ = eeprom_getb(1);
+
+    *buf++ = eeprom_getb(0);
+    hal_delay_us(5);
+    eeprom_stop();
+
+    return nbytes;
+}
+
+static void
+eeprom_write(int addr, cyg_uint8 val)
+{
+    cyg_uint8 start_byte;
+    int i;
+
+    start_byte = 0xA0;  // write
+
+    if (addr & (1 << 8))
+	start_byte |= 2;
+
+    for (i = 0; i < 10; i++)
+	if (eeprom_start(start_byte))
+	    break;
+
+    if (i == 10) {
+	diag_printf("eeprom_write: Can't get start ACK\n");
+	return;
+    }
+
+    if (!eeprom_putb(addr & 0xff)) {
+	diag_printf("eeprom_write: Can't get address ACK\n");
+	return;
+    }
+
+    if (!eeprom_putb(val)) {
+	diag_printf("eeprom_write: no data ACK\n");
+	return;
+    }
+    eeprom_stop();
+}
+
+
+#define MAC_EEPROM_OFFSET(p)  (0x100 + ((p) * 6))
+
+int
+cyghal_get_npe_esa(int port, cyg_uint8 *buf)
+{
+    if (port != 0 && port != 1)
+	return 0;
+
+    if (eeprom_read(MAC_EEPROM_OFFSET(port), buf, 6) != 6)
+	return 0;
+
+    // don't use broadcast address
+    if (buf[0] == 0xff && buf[1] == 0xff && buf[2] == 0xff &&
+        buf[3] == 0xff && buf[4] == 0xff && buf[5] == 0xff)
+	return 0;
+
+    return 1;
+}
+
+
+#ifdef CYGPKG_REDBOOT
+#include <redboot.h>
+
+static void
+do_set_npe_mac(int argc, char *argv[])
+{
+    bool portnum_set;
+    int  portnum, i;
+    char *addr = 0;
+    struct option_info opts[1];
+    cyg_uint8  mac[6];
+    
+    init_opts(&opts[0], 'p', true, OPTION_ARG_TYPE_NUM, 
+              (void **)&portnum, (bool *)&portnum_set, "port number");
+    if (!scan_opts(argc, argv, 1, opts, 1, (void *)&addr,
+		   OPTION_ARG_TYPE_STR, "MAC address")) {
+        return;
+    }
+
+    if ((!portnum_set && addr) ||
+	(portnum_set && portnum != 0 && portnum != 1)) {
+	diag_printf("Must specify port with \"-p <0|1>\"\n");
+	return;
+    }
+
+    if (!portnum_set) {
+	for (i = 0; i < 2; i++) {
+	    cyghal_get_npe_esa(i, mac);
+	    diag_printf("NPE eth%d mac: %02x:%02x:%02x:%02x:%02x:%02x\n",
+			i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+	}
+	return;
+    }
+
+    if (!addr) {
+	cyghal_get_npe_esa(portnum, mac);
+	diag_printf("NPE eth%d mac: %02x:%02x:%02x:%02x:%02x:%02x\n",
+		    portnum, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+	return;
+    }
+
+    // parse MAC address from user.
+    // acceptable formats are "nn:nn:nn:nn:nn:nn" and "nnnnnnnnnnnn"
+    for (i = 0; i < 6; i++) {
+	if (!_is_hex(addr[0]) || !_is_hex(addr[1]))
+	    break;
+	mac[i] = (_from_hex(addr[0]) * 16) + _from_hex(addr[1]);
+	addr += 2;
+	if (*addr == ':')
+	    addr++;
+    }
+    
+    if (i != 6 || *addr != '\0') {
+	diag_printf("Malformed MAC address.\n");
+	return;
+    }
+
+    for (i = 0; i < 6; i++) {
+	eeprom_write(MAC_EEPROM_OFFSET(portnum) + i, mac[i]);
+	hal_delay_us(100000);
+    }
+}
+
+RedBoot_cmd("set_npe_mac", 
+            "Set/Read MAC address for NPE ethernet ports", 
+            "[-p <portnum>] [xx:xx:xx:xx:xx:xx]",
+            do_set_npe_mac);
+
+#endif // CYGPKG_REDBOOT
+
+#endif // CYGPKG_DEVS_ETH_INTEL_NPE
+
+// ------------------------------------------------------------------------
+// EOF prpmc1100_misc.c
Index: packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_pci.c
===================================================================
RCS file: packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_pci.c
diff -N packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_pci.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ packages/hal/arm/xscale/prpmc1100/current/src/prpmc1100_pci.c	5 Jun 2003 13:16:45 -0000
@@ -0,0 +1,165 @@
+//==========================================================================
+//
+//      prpmc1100_pci.c
+//
+//      HAL PCI board support code for Intel XScale PrPMC1100
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    msalter
+// Contributors: msalter
+// Date:         2003-03-27
+// Purpose:      HAL PCI board support
+// Description:  Implementations of HAL board interfaces
+//
+//####DESCRIPTIONEND####
+//
+//========================================================================*/
+#include <pkgconf/hal.h>
+#include <pkgconf/system.h>
+#include CYGBLD_HAL_PLATFORM_H
+
+#ifdef CYGPKG_IO_PCI
+
+#include <cyg/infra/cyg_type.h>         // base types
+#include <cyg/infra/cyg_trac.h>         // tracing macros
+#include <cyg/infra/cyg_ass.h>          // assertion macros
+
+#include <cyg/hal/hal_io.h>             // IO macros
+#include <cyg/hal/hal_if.h>             // calling interface API
+#include <cyg/hal/hal_arch.h>           // Register state info
+#include <cyg/hal/hal_diag.h>
+#include <cyg/hal/hal_intr.h>           // Interrupt names
+#include <cyg/hal/hal_cache.h>
+#include <cyg/io/pci_hw.h>
+#include <cyg/io/pci.h>
+
+
+#define IXP425_PCI_MAX_DEV      4
+#define IXP425_PCI_IRQ_LINES    4
+
+// PCI pin mappings
+#define PCI_CLK_GPIO     14  // CLK0
+#define PCI_RESET_GPIO   12
+
+#define PCI_INTA_GPIO    11
+#define PCI_INTB_GPIO    10
+#define PCI_INTC_GPIO     9
+#define PCI_INTD_GPIO     8
+
+#define INTA    CYGNUM_HAL_INTERRUPT_GPIO11
+#define INTB    CYGNUM_HAL_INTERRUPT_GPIO10
+#define INTC    CYGNUM_HAL_INTERRUPT_GPIO9
+#define INTD    CYGNUM_HAL_INTERRUPT_GPIO8
+
+void
+cyg_hal_plf_pci_translate_interrupt(cyg_uint32 bus, cyg_uint32 devfn,
+				    CYG_ADDRWORD *vec, cyg_bool *valid)
+{
+    *vec = INTA;
+    *valid = true;
+}
+
+
+#define HAL_PCI_CLOCK_ENABLE() \
+    *IXP425_GPCLKR |= GPCLKR_CLK0_ENABLE;  // GPIO(0) used for PCI clock
+
+#define HAL_PCI_CLOCK_DISABLE() \
+    *IXP425_GPCLKR &= ~GPCLKR_CLK0_ENABLE;  // GPIO(0) used for PCI clock
+
+#define HAL_PCI_CLOCK_CONFIG() \
+    *IXP425_GPCLKR |= GPCLKR_CLK0_PCLK2;
+
+#define HAL_PCI_RESET_ASSERT() \
+    HAL_GPIO_OUTPUT_CLEAR(PCI_RESET_GPIO);
+
+#define HAL_PCI_RESET_DEASSERT() \
+    HAL_GPIO_OUTPUT_SET(PCI_RESET_GPIO);
+
+void
+hal_plf_pci_init(void)
+{
+    cyg_uint8  next_bus;
+    int  is_host = (*IXP425_PCI_CSR & PCI_CSR_HOST);
+
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
+
+    if (is_host) {
+	// PCI interrupt inputs
+	HAL_GPIO_OUTPUT_DISABLE(PCI_INTA_GPIO);
+	HAL_GPIO_OUTPUT_DISABLE(PCI_INTB_GPIO);
+	HAL_GPIO_OUTPUT_DISABLE(PCI_INTC_GPIO);
+	HAL_GPIO_OUTPUT_DISABLE(PCI_INTD_GPIO);
+
+	// configure PCI interrupt lines for active low irq
+	HAL_INTERRUPT_CONFIGURE(INTA, 1, 0);
+	HAL_INTERRUPT_CONFIGURE(INTB, 1, 0);
+	HAL_INTERRUPT_CONFIGURE(INTC, 1, 0);
+	HAL_INTERRUPT_CONFIGURE(INTD, 1, 0);
+
+    } else {
+	// PCI interrupt outputs
+	HAL_GPIO_OUTPUT_SET(PCI_INTA_GPIO);
+	HAL_GPIO_OUTPUT_ENABLE(PCI_INTA_GPIO);
+	HAL_GPIO_OUTPUT_SET(PCI_INTB_GPIO);
+	HAL_GPIO_OUTPUT_ENABLE(PCI_INTB_GPIO);
+	HAL_GPIO_OUTPUT_SET(PCI_INTC_GPIO);
+	HAL_GPIO_OUTPUT_ENABLE(PCI_INTC_GPIO);
+	HAL_GPIO_OUTPUT_SET(PCI_INTD_GPIO);
+	HAL_GPIO_OUTPUT_ENABLE(PCI_INTD_GPIO);
+    }
+
+    HAL_DELAY_US(100);
+#endif
+
+    cyg_hal_plf_pci_init();
+
+    if (is_host) {
+	int delay = 200;  // Wait up to 20 seconds for EREADY
+	while (delay-- > 0)
+	    if (*PRPMC_CTL_REG & PRPMC_CTL_EREADY)
+		break;
+	    else
+		hal_delay_us(100000);
+
+	next_bus = 1;
+	cyg_pci_configure_bus(0, &next_bus);
+    } else
+	*PRPMC_CTL_REG = PRPMC_CTL_RESETOUT | PRPMC_CTL_INTN_GPIO | PRPMC_CTL_EREADY;
+}
+
+#endif // CYGPKG_IO_PCI
Index: packages/redboot/current/doc/redboot_installing.sgml
===================================================================
RCS file: /cvs/ecos/ecos/packages/redboot/current/doc/redboot_installing.sgml,v
retrieving revision 1.9
diff -u -p -5 -r1.9 redboot_installing.sgml
--- packages/redboot/current/doc/redboot_installing.sgml	13 May 2003 18:38:15 -0000	1.9
+++ packages/redboot/current/doc/redboot_installing.sgml	5 Jun 2003 13:17:06 -0000
@@ -4123,10 +4123,180 @@ Virtual Address   Physical Address  XCB 
 <title>Platform Resource Usage</title>
 <para>The IXP425 programmable OStimer0 is used for timeout support
 for networking and XModem file transfers.</para>
 </sect2></sect1>
 
+<?Pub _newpage>
+<sect1 id="PrPMC1100">
+<title>Motorola PrPMC1100 CPU card</title>
+<sect2>
+<title>Overview</title>
+<para><indexterm><primary>Motorola PrPMC1100</primary><secondary>installing and
+testing</secondary></indexterm><indexterm><primary>installing and testing
+</primary><secondary>Motorola PrPMC1100</secondary></indexterm>RedBoot supports
+the builtin high-speed and console UARTs
+.
+The console UART is the default and feeds the front panel COM1 connector. The
+high-speed UART signals are only available from the PN4 IO connector. Therefore,
+usability of this port depends on the carrier board used. The default serial
+port settings are 115200,8,N,1. RedBoot also supports flash management for
+the 16MB boot flash on the mainboard.</para>
+
+<para>The following RedBoot configurations are supported:
+
+      <informaltable frame="all">
+	<tgroup cols="4" colsep="1" rowsep="1" align="left">
+	  <thead>
+	    <row>
+	      <entry>Configuration</entry>
+	      <entry>Mode</entry>
+	      <entry>Description</entry>
+	      <entry>File</entry>
+	    </row>
+	  </thead>
+	  <tbody>
+	    <row>
+	      <entry>ROM</entry>
+	      <entry>[ROM]</entry>
+	      <entry>RedBoot running from flash
+	      sector.</entry>
+	      <entry>redboot_ROM.ecm</entry>
+	    </row>
+	    <row>
+	      <entry>RAM</entry>
+	      <entry>[RAM]</entry>
+	      <entry>RedBoot running from RAM with RedBoot in the
+	      flash boot sector.</entry>
+	      <entry>redboot_RAM.ecm</entry>
+	    </row>
+</tbody>
+</tgroup>
+</informaltable>
+</para>
+
+</sect2>
+<sect2>
+<title>Initial Installation Method</title>
+<para>The PrPMC1100 flash is socketed, so initial installation may be done using
+an appropriate device programmer. JTAG based flash programming may also be used.
+In either case, the ROM mode RedBoot is programmed into the boot flash at address
+0x00000000.
+</para>
+
+<para>After booting the initial installation of RedBoot, this warning may
+be printed: <screen>flash configuration checksum error or invalid key
+</screen>This is normal, and indicates that the flash should be configured
+for use by RedBoot. Even if this message is not seen, it is recommended that
+the <command>fconfig</command> be run to initialize the flash configuration
+area. See <xref linkend="Persistent-State-Flash"> for more details.
+</para></sect2>
+
+<sect2>
+<title>Rebuilding RedBoot </title>
+
+<para>These shell variables provide the platform-specific information
+needed for building RedBoot according to the procedure described in
+<xref linkend="Rebuilding-Redboot">:
+<programlisting>
+export TARGET=prpmc1100
+export ARCH_DIR=arm
+export PLATFORM_DIR=xscale/prpmc1100
+</programlisting>
+</para>
+
+<para>The names of configuration files are listed above with the
+description of the associated modes.</para>
+</sect2>
+
+<sect2>
+<title>Interrupts</title>
+<para>RedBoot uses an interrupt vector table which is located at address 0x8004.
+Entries in this table are pointers to functions with this protoype::      <programlisting>
+int irq_handler( unsigned vector, unsigned data )</programlisting>On the Mainstone
+board, the vector argument is one of many interrupts defined in <computeroutput>
+hal/arm/xscale/bulverde/current/include/hal_var_ints.h:</computeroutput>:   <programlisting>
+#define CYGNUM_HAL_INTERRUPT_NPEA         0
+#define CYGNUM_HAL_INTERRUPT_NPEB         1
+#define CYGNUM_HAL_INTERRUPT_NPEC         2
+#define CYGNUM_HAL_INTERRUPT_QM1          3
+#define CYGNUM_HAL_INTERRUPT_QM2          4
+#define CYGNUM_HAL_INTERRUPT_TIMER0       5
+#define CYGNUM_HAL_INTERRUPT_GPIO0        6
+#define CYGNUM_HAL_INTERRUPT_GPIO1        7
+#define CYGNUM_HAL_INTERRUPT_PCI_INT      8
+#define CYGNUM_HAL_INTERRUPT_PCI_DMA1     9
+#define CYGNUM_HAL_INTERRUPT_PCI_DMA2     10
+#define CYGNUM_HAL_INTERRUPT_TIMER1       11
+#define CYGNUM_HAL_INTERRUPT_USB          12
+#define CYGNUM_HAL_INTERRUPT_UART2        13
+#define CYGNUM_HAL_INTERRUPT_TIMESTAMP    14
+#define CYGNUM_HAL_INTERRUPT_UART1        15
+#define CYGNUM_HAL_INTERRUPT_WDOG         16
+#define CYGNUM_HAL_INTERRUPT_AHB_PMU      17
+#define CYGNUM_HAL_INTERRUPT_XSCALE_PMU   18
+#define CYGNUM_HAL_INTERRUPT_GPIO2        19
+#define CYGNUM_HAL_INTERRUPT_GPIO3        20
+#define CYGNUM_HAL_INTERRUPT_GPIO4        21
+#define CYGNUM_HAL_INTERRUPT_GPIO5        22
+#define CYGNUM_HAL_INTERRUPT_GPIO6        23
+#define CYGNUM_HAL_INTERRUPT_GPIO7        24
+#define CYGNUM_HAL_INTERRUPT_GPIO8        25
+#define CYGNUM_HAL_INTERRUPT_GPIO9        26
+#define CYGNUM_HAL_INTERRUPT_GPIO10       27
+#define CYGNUM_HAL_INTERRUPT_GPIO11       28           
+#define CYGNUM_HAL_INTERRUPT_GPIO12       29
+#define CYGNUM_HAL_INTERRUPT_SW_INT1      30
+#define CYGNUM_HAL_INTERRUPT_SW_INT2      31
+</programlisting>
+The data passed to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
+</computeroutput> which immediately follows the interrupt vector table. With
+32 interrupts, the data table starts at address 0x8084.   </para>
+<para>An application may create a normal C function with the above prototype
+to be an ISR. Just poke its address into the table at the correct index and
+enable the interrupt at its source. The return value of the ISR is ignored
+by RedBoot.</para>
+</sect2>
+<sect2>
+<title>Memory Maps</title>
+<para>The RAM based page table is located at RAM start + 0x4000.
+<note><title>NOTE</title>
+<para>The virtual memory maps in this section use a C, B, and X column to indicate
+the caching policy for the region..</para>
+</note></para>
+<para><programlisting>
+X C B  Description
+- - -  ---------------------------------------------
+0 0 0  Uncached/Unbuffered
+0 0 1  Uncached/Buffered
+0 1 0  Cached/Buffered    Write Through, Read Allocate
+0 1 1  Cached/Buffered    Write Back, Read Allocate
+1 0 0  Invalid -- not used
+1 0 1  Uncached/Buffered  No write buffer coalescing
+1 1 0  Mini DCache - Policy set by Aux Ctl Register
+1 1 1  Cached/Buffered    Write Back, Read/Write Allocate
+
+Virtual Address   Physical Address  XCB  Size (MB)  Description
+---------------   ----------------  ---  ---------  -----------
+   0x00000000       0x00000000      010     256     SDRAM (cached)
+   0x10000000       0x10000000      010     256     SDRAM (alias)
+   0x20000000       0x00000000      000     256     SDRAM (uncached)
+   0x48000000       0x48000000      000      64     PCI Data
+   0x50000000       0x50000000      010      16     Flash (CS0)
+   0x51000000       0x51000000      000     112     CS1 - CS7
+   0x60000000       0x60000000      000      64     Queue Manager
+   0xC0000000       0xC0000000      000       1     PCI Controller
+   0xC4000000       0xC4000000      000       1     Exp. Bus Config
+   0xC8000000       0xC8000000      000       1     Misc CPU IO
+   0xCC000000       0xCC000000      000       1     SDRAM Config
+
+</programlisting></para>
+</sect2>
+<sect2>
+<title>Platform Resource Usage</title>
+<para>The CPU programmable OStimer0 is used for timeout support
+for networking and XModem file transfers.</para>
+</sect2></sect1>
 
 <!-- ********************** CalmRISC ********************** -->
 <?Pub _newpage>
 <sect1 id="CalmRISC16">
 <title>CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board </title>


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