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Minor AT91 fix
- From: daniel dot neri at sigicom dot se (Daniel Néri)
- To: ecos-patches at sources dot redhat dot com
- Date: Fri, 11 Jul 2003 11:28:49 +0200
- Subject: Minor AT91 fix
- Cancel-lock: sha1:Nq2mQqOwnK86D6s0EDDGNSQCT/c=
- Organization: Sigicom AB, Stockholm, Sweden
Hello,
There's not much to say about the patch below, except that I think
there should really be some translation where eCos interrupt
priorities are suitably mapped to hardware interrupt levels.
E.g. using the generic 16x5x UART driver on AT91 gives a problem
because, for some reason, 99 was chosen as the interrupt priority
level.
diff -u -5 -p -r1.1.1.4 -r1.8
--- hal/arm/at91/var/current/ChangeLog 2003/06/24 09:51:19 1.1.1.4
+++ hal/arm/at91/var/current/ChangeLog 2003/06/25 15:30:20 1.8
@@ -1,5 +1,10 @@
+2003-06-25 Daniel Néri <daniel.neri@sigicom.se>
+
+ * src/at91_misc.c (hal_interrupt_set_level): Fix assert condition;
+ AT91 interrupt priority levels are between 0 and 7.
+
2003-06-24 Jonathan Larmour <jifl@eCosCentric.com>
* include/var_io.h: Remove not seemingly useful AT91_PMC_SCER_CPU.
* cdl/hal_arm_at91.cdl: We have a var_arch.h so define
diff -u -5 -p -r1.1.1.4 at91_misc.c
--- hal/arm/at91/var/current/src/at91_misc.c 2003/06/24 09:51:19 1.1.1.4
+++ hal/arm/at91/var/current/src/at91_misc.c 2003/07/11 09:10:14
@@ -245,11 +245,11 @@ void hal_interrupt_set_level(int vector,
{
cyg_uint32 mode;
CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX &&
vector >= CYGNUM_HAL_ISR_MIN , "Invalid vector");
- CYG_ASSERT(level >= 1 && level <= 7, "Invalid level");
+ CYG_ASSERT(level >= 0 && level <= 7, "Invalid level");
HAL_READ_UINT32(AT91_AIC+(AT91_AIC_SMR0+(vector*4)), mode);
mode = (mode & ~AT91_AIC_SMR_PRIORITY) | level;
HAL_WRITE_UINT32(AT91_AIC+(AT91_AIC_SMR0+(vector*4)), mode);
}