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Re: at91 HAL patch
On Tue, 19 Aug 2003 15:23:43 +0200
Andrew Lunn <andrew.lunn@ascom.ch> wrote:
> > > Well, we already have the CYGHWR_HAL_ARM_AT91 option that must be set
> > > in the platform HAL to select the correct AT91 variant. This is used
> > > in var_io.h to differentiate between different power-saving
> > > devices. The same option should be used to select different sets of
> > > PIO pin definitions.
> >
>
> > True. To avoid problems the recently added definitions should be
> > surrounded with the good #ifdef #endif directive.
>
> OK. Could you give me a list of which AT91 varients do/do not support
> the Parrallel IO register.
>
> Andrew
>
I assume all at91 mcu support the same PIO IP (I don't know for the M42800A).
AFAIK the bit field definitions from thomas applies only when CYGHWR_HAL_ARM_AT91 is R40807 or R40008 (maybe M42800A), more generally for the whole AT91x40xxx family.
Moreover the bit definition does not apply only for the PSR, but for all PIO registers. Why not renaming them from AT91_PIO_PSR_XXX to AT91_PIO_XXX.
IMHO, it is not a good idea to provide "default values" for the peripheral base address (AT91_PIO, AT91_AIC,...). The memory mapping of the peripheral is know at mcu level (ie in at91/var package), so it should be defined here (directly in this file or with an include).
regards,
--
GONZALEZ Laurent
Silicomp Research Institute
Tel: 04 76 41 66 98