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Misc warning cleanups


-- 
Gary Thomas <gary@mlbassoc.com>
MLB Associates
Index: devs/eth/ns/dp83816/current/src/if_dp83816.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/eth/ns/dp83816/current/src/if_dp83816.c,v
retrieving revision 1.4
diff -u -5 -p -r1.4 if_dp83816.c
--- devs/eth/ns/dp83816/current/src/if_dp83816.c	14 Oct 2003 17:46:04 -0000	1.4
+++ devs/eth/ns/dp83816/current/src/if_dp83816.c	9 Feb 2004 20:19:23 -0000
@@ -7,10 +7,11 @@
 //==========================================================================
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003, 2004 Gary Thomas
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
 // Software Foundation; either version 2 or (at your option) any later version.
 //
@@ -377,11 +378,10 @@ dp83816_recv(struct eth_drv_sc *sc, stru
 static void
 dp83816_warm_reset(struct eth_drv_sc *sc)
 {
     struct dp83816_priv_data *dp = (struct dp83816_priv_data *)sc->driver_private;
     dp83816_bd_t *bdp;
-    int len, err;
     int i;
 
     // Free up any active Tx buffers
     bdp = CYGARC_UNCACHED_ADDRESS(dp->txd);
     for (i = 0; i < dp->txnum; i++, bdp++) {
Index: devs/eth/phy/current/src/eth_phy.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/eth/phy/current/src/eth_phy.c,v
retrieving revision 1.2
diff -u -5 -p -r1.2 eth_phy.c
--- devs/eth/phy/current/src/eth_phy.c	26 Aug 2003 17:54:00 -0000	1.2
+++ devs/eth/phy/current/src/eth_phy.c	9 Feb 2004 20:20:03 -0000
@@ -6,11 +6,11 @@
 //
 //==========================================================================
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 2003 Gary Thomas
+// Copyright (C) 2003, 2004 Gary Thomas
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
 // Software Foundation; either version 2 or (at your option) any later version.
 //
@@ -232,11 +232,11 @@ _eth_phy_cfg(eth_phy_access_t *f, int mo
     unsigned short reset_mode, phy_state;
     int i;
 
     if (!f->init_done) {
         diag_printf("PHY config without init on PHY: %x\n", f);
-        return;
+        return 0;
     }
 
     // Reset PHY (transceiver)
     phy_ok = false;
     _eth_phy_reset(f);
Index: hal/powerpc/ppc40x/current/src/var_intr.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/ppc40x/current/src/var_intr.c,v
retrieving revision 1.6
diff -u -5 -p -r1.6 var_intr.c
--- hal/powerpc/ppc40x/current/src/var_intr.c	19 Sep 2003 17:11:30 -0000	1.6
+++ hal/powerpc/ppc40x/current/src/var_intr.c	9 Feb 2004 20:21:44 -0000
@@ -7,11 +7,11 @@
 //==========================================================================
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-// Copyright (C) 2002, 2003 Gary Thomas
+// Copyright (C) 2002, 2003, 2004 Gary Thomas
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
 // Software Foundation; either version 2 or (at your option) any later version.
 //
@@ -191,10 +191,11 @@ hal_ppc40x_interrupt_mask(int vector)
         tcr &= ~TCR_WIE;
         CYGARC_MTSPR(SPR_TCR, tcr);
         _hold_tcr = tcr;
         break;
     default:
+        break;
     }
 }
 
 externC void 
 hal_ppc40x_interrupt_unmask(int vector)
@@ -240,10 +241,11 @@ hal_ppc40x_interrupt_unmask(int vector)
         tcr |= TCR_WIE;
         CYGARC_MTSPR(SPR_TCR, tcr);
         _hold_tcr = tcr;
         break;
     default:
+        break;
     }
 }
 
 externC void 
 hal_ppc40x_interrupt_acknowledge(int vector)
@@ -273,10 +275,11 @@ hal_ppc40x_interrupt_acknowledge(int vec
     case CYGNUM_HAL_INTERRUPT_DMA0:
     case CYGNUM_HAL_INTERRUPT_DMA1:
     case CYGNUM_HAL_INTERRUPT_DMA2:
     case CYGNUM_HAL_INTERRUPT_DMA3:
     default:
+        break;
     }
 }
 
 // Note: These functions are only [well] defined for "external" interrupts
 // which can be controlled via the EXIER register.
@@ -367,10 +370,11 @@ hal_ppc40x_interrupt_mask(int vector)
         tcr &= ~TCR_WIE;
         CYGARC_MTSPR(SPR_TCR, tcr);
         _hold_tcr = tcr;
         break;
     default:
+        break;
     }
 }
 
 externC void 
 hal_ppc40x_interrupt_unmask(int vector)
@@ -407,10 +411,11 @@ hal_ppc40x_interrupt_unmask(int vector)
         tcr |= TCR_WIE;
         CYGARC_MTSPR(SPR_TCR, tcr);
         _hold_tcr = tcr;
         break;
     default:
+        break;
     }
 }
 
 externC void 
 hal_ppc40x_interrupt_acknowledge(int vector)
@@ -431,10 +436,11 @@ hal_ppc40x_interrupt_acknowledge(int vec
         break;
     case CYGNUM_HAL_INTERRUPT_WATCHDOG_TIMER:
         CYGARC_MTSPR(SPR_TSR, TSR_WIS);  // clear & acknowledge interrupt
         break;
     default:
+        break;
     }
 }
 
 // Note: These functions are only [well] defined for "external" interrupts
 externC void 

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