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mailing list for the eCos project.
Rework of ec555-port
- From: Bob Koninckx <bob dot koninckx at o-3s dot com>
- To: ecos-patches at sources dot redhat dot com
- Date: Tue, 20 Apr 2004 12:09:22 +0200
- Subject: Rework of ec555-port
- Organization: o-3s
- Reply-to: bob dot koninckx at o-3s dot com
I reworked the ec555 port to support all four variants of the ec555
board. I additionally reserved some of the external ram for redboot,
allowing the latter to be build with ethernet support as well (which
simply did not fit into the internal RAM of the mpc555 as i did it till
now).
I'd appreciate if somebody could have a look at this and if possible
commit these patches.
Thanks,
Bob
? ec555_flash.patch
Index: current/ChangeLog
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/devs/eth/powerpc/ec555/current/ChangeLog,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -5 -r1.1.1.1 -r1.2
--- current/ChangeLog 24 Nov 2003 19:46:39 -0000 1.1.1.1
+++ current/ChangeLog 8 Apr 2004 19:53:15 -0000 1.2
@@ -1,5 +1,13 @@
+2004-04-08 Bob Koninckx <bob.koninckx@o-3s.com>
+ * cdl/ec555_eth_drivers.cdl: Made CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_BASE
+ a calculated option that is always consistent with the memory map. Added
+ the possibility to set the esa as a configuration option.
+ * include/devs_eth_powerpc_ec555.inl: Made hardware swapping or software
+ swapping of data bytes (mostly relevant to big endian machines) a
+ configuration option
+
2003-11-05 Bob Koninckx <bob.koninckx@mech.kuleuven.ac.be>
* include/devs_eth_powerpc_ec555.inl:
* cdl/ec555_eth_drivers.cdl: New package - support on PowerPC EC555
Index: current/cdl/ec555_eth_drivers.cdl
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/devs/eth/powerpc/ec555/current/cdl/ec555_eth_drivers.cdl,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -5 -r1.1.1.1 -r1.2
--- current/cdl/ec555_eth_drivers.cdl 24 Nov 2003 19:46:39 -0000 1.1.1.1
+++ current/cdl/ec555_eth_drivers.cdl 8 Apr 2004 19:53:15 -0000 1.2
@@ -108,15 +108,13 @@
}
cdl_option CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_BASE {
display "Base address to use for accessing the device"
flavor data
- default_value 0xd0000000
+ calculated { CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_CS == 2 ? 0x04000000 : 0x08000000 }
description "
- This option determines the base address to use for the memory controller.
- Make sure that it does not conflict with aother settings. Leaving it to the
- default should be ok"
+ This option determines the base address to use for the memory controller"
}
cdl_option CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_IRQ {
display "Interrupt line on the ec555 to use"
flavor data
@@ -128,11 +126,10 @@
}
cdl_component CYGSEM_DEVS_ETH_POWERPC_EC555_ETH0_SET_ESA {
display "Set the ethernet station address"
flavor bool
- calculated 0
description "Enabling this option will allow the ethernet
station address to be forced to the value set by the
configuration. This may be required if the hardware does
not include a serial EEPROM for the ESA."
Index: current/include/devs_eth_powerpc_ec555.inl
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/devs/eth/powerpc/ec555/current/include/devs_eth_powerpc_ec555.inl,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -5 -r1.1.1.1 -r1.2
--- current/include/devs_eth_powerpc_ec555.inl 24 Nov 2003 19:46:39 -0000 1.1.1.1
+++ current/include/devs_eth_powerpc_ec555.inl 8 Apr 2004 19:53:15 -0000 1.2
@@ -112,57 +112,64 @@
#endif // ! CYGSEM_DEVS_ETH_POWERPC_EC555_ETH0_SET_ESA
// ------------------------------------------------------------------------
// EEPROM access functions
// These are byte swapped
-#define PP_ECR 0x4000
+#ifdef CYGIMP_DEVS_ETH_CL_CS8900A_DATABUS_BYTE_SWAPPED
+#define PP_ECR 0x4000 // EEPROM Command Register
#define PP_EE_READ_CMD 0x0002
#define PP_EE_WRITE_CMD 0x0001
#define PP_EE_DATA 0x4200
+#else
+#define PP_ECR 0x0040 // EEPROM Command Register
+#define PP_EE_READ_CMD 0x0200
+#define PP_EE_WRITE_CMD 0x0100
+#define PP_EE_DATA 0x0042
+#endif
#define PP_EE_ADDR_W0 0x001C // Notice that the EEPROM is not programmed when you got the
#define PP_EE_ADDR_W1 0x001D // Module from Wuerz. Make sure to program the address to these
#define PP_EE_ADDR_W2 0x001E // locations before using the adapter. This is fairly easy using GDB
-// The example below programs the MAC address aa bb cc dd ee ff to the eeprom, supposed that the module
-// is mapped to adresses 0xd000 0000
+// The example below programs the MAC address 0050 c4ff fc07 to the eeprom, supposed that the module
+// is mapped to adresses 0x0400 0000, and supposed that the data bus is _not_ byte swapped
//
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x3000 erase/write enable
-// set *(unsigned short *)0xd000030a = 0x4200 select eeprom data
-// set *(unsigned short *)0xd000030c = 0xaabb write data
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x1c01 write to offset 1c
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x0000 erase/write disable
-
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x3000 erase/write enable
-// set *(unsigned short *)0xd000030a = 0x4200 select eeprom data
-// set *(unsigned short *)0xd000030c = 0xccdd write data
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x1d01 write to offset 1d
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x0000 erase/write disable
-
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x3000 erase/write enable
-// set *(unsigned short *)0xd000030a = 0x4200 select eeprom data
-// set *(unsigned short *)0xd000030c = 0xeeff write data
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x1e01 write to offset 1c
-// set *(unsigned short *)0xd000030a = 0x4000 select eeprom command
-// set *(unsigned short *)0xd000030c = 0x0000 erase/write disable
+// set *(unsigned short *)0x0400030a = 0x0040 Make the eeprom writable / erasable
+// set *(unsigned short *)0x0400030c = 0x0030
+//
+// set *(unsigned short *)0x0400030a = 0x0040 erase the old esa
+// set *(unsigned short *)0x0400030c = 0x031c
+// set *(unsigned short *)0x0400030c = 0x031d
+// set *(unsigned short *)0x0400030c = 0x031e
+//
+// set *(unsigned short *)0x0400030a = 0x0042 program the new esa
+// set *(unsigned short *)0x0400030c = 0x5000
+// set *(unsigned short *)0x0400030a = 0x0040
+// set *(unsigned short *)0x0400030c = 0x011c
+// set *(unsigned short *)0x0400030a = 0x0042
+// set *(unsigned short *)0x0400030c = 0xffc4
+// set *(unsigned short *)0x0400030a = 0x0040
+// set *(unsigned short *)0x0400030c = 0x011d
+// set *(unsigned short *)0x0400030a = 0x0042
+// set *(unsigned short *)0x0400030c = 0x07fc
+// set *(unsigned short *)0x0400030a = 0x0040
+// set *(unsigned short *)0x0400030c = 0x011e
+//
+// set *(unsigned short *)0x0400030a = 0x0040 Write protect the eeprom
+// set *(unsigned short *)0x0400030c = 0x0030
static __inline__ cyg_uint16
read_eeprom(cyg_addrword_t base, cyg_uint16 offset)
{
while (get_reg(base, PP_SelfStat) & PP_SelfStat_SIBSY)
;
- // Swap the offset, this is a BIG-ENDIAN machine
+#ifdef CYGIMP_DEVS_ETH_CL_CS8900A_DATABUS_BYTE_SWAPPED
put_reg(base, PP_ECR, (CYG_SWAP16(offset) | PP_EE_READ_CMD));
+#else
+ put_reg(base, PP_ECR, (offset | PP_EE_READ_CMD));
+#endif
while (get_reg(base, PP_SelfStat) & PP_SelfStat_SIBSY)
;
return get_reg(base, PP_EE_DATA);
@@ -174,18 +181,22 @@
volatile cyg_uint16 esa_word;
cyg_uint16 i;
for (i = 0; i < 6; i += 2)
{ // Offset in the eeprom is WORD oriented, in the packetpage BYTE oriented
esa_word = read_eeprom(base, PP_EE_ADDR_W0 + (i/2));
+#ifdef CYGIMP_DEVS_ETH_CL_CS8900A_DATABUS_BYTE_SWAPPED
put_reg(base, (PP_IA + CYG_SWAP16(i)), esa_word);
+#else
+ put_reg(base, (PP_IA + i), esa_word);
+#endif
}
}
// Not so nice, but reading these will never conflict on the ec555
// They certainly differ in A18
-#define FIRSTRAM 0x00400000
-#define LASTRAM 0x004ffffe
+#define FIRSTRAM 0x01000000
+#define LASTRAM 0x010ffffe
static __inline__ void
post_reset(cyg_addrword_t base)
{
cyg_uint16 tmp;
? ec555.patch
Index: current/ChangeLog
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/hal/powerpc/ec555/current/ChangeLog,v
retrieving revision 1.1.1.4
diff -u -5 -r1.1.1.4 ChangeLog
--- current/ChangeLog 11 Jan 2004 16:05:41 -0000 1.1.1.4
+++ current/ChangeLog 19 Apr 2004 19:10:26 -0000
@@ -1,5 +1,52 @@
+2004-04-19 Bob Koninckx <bob.koninckx@o-3s.com>
+ * src/ec555.S: Corrected typo in initialisation of SYPCR to make sure
+ watchdog no longer ticks when FREEZE is asserted. Changed initialisation
+ of TBSCR to make sure timebase continues ticking when FREEZE is asserted.
+ * src/ec555.S: Removed definition of memory segments. We do not need them
+ afterall.
+ * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h:
+ * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h:
+ * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h:
+ * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h:
+ * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi: Reserved a block of
+ 64K at the beginning of external ram for use by RedBoot. Only really
+ necessary if network support is wanted.
+ * include/pkgconf/mlt_powerpc_ec555_ram.h:
+ * include/pkgconf/mlt_powerpc_ec555_ram.ldi:
+ * include/pkgconf/mlt_powerpc_ec555_rom.h:
+ * include/pkgconf/mlt_powerpc_ec555_rom.ldi: Permanently removed
+
+2004-04-08 Bob Koninckx <bob.koninckx@o-3s.com>
+ * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi: New file
+ * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi: New file
+ * include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h: New file
+ * include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi: New file
+ * include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi: New file
+ * include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi: New file
+ * cdl/hal_powerpc_ec555.cdl, src/ec555.S, plf_misc.c: Added support
+ for all four different variants of the ec555 board. Notice that we
+ had to change the memory map. 16 MB flashes simply did not fit in
+ the one we defined previously.
+
2003-12-16 Gary Thomas <gary@mlbassoc.com>
* misc/redboot_ROM.ecm:
* misc/redboot_RAM.ecm:
CYGNUM_FLASH_WORKSPACE_SIZE is no longer used.
Index: current/cdl/hal_powerpc_ec555.cdl
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/hal/powerpc/ec555/current/cdl/hal_powerpc_ec555.cdl,v
retrieving revision 1.1.1.2
retrieving revision 1.2
diff -u -5 -r1.1.1.2 -r1.2
--- current/cdl/hal_powerpc_ec555.cdl 21 Oct 2003 19:49:45 -0000 1.1.1.2
+++ current/cdl/hal_powerpc_ec555.cdl 8 Apr 2004 20:17:46 -0000 1.2
@@ -87,10 +87,21 @@
application on to the board. The ROM bootstrap typically
requires that the eCos application be blown into EPROMs or
equivalent technology."
}
+ cdl_option CYGHWR_HAL_EC555_BOARD_VARIANT {
+ display "Board type"
+ flavor data
+ legal_values {"F02_S01" "F04_S02" "F08_S04" "F08_S08"}
+ default_value {"F02_S01"}
+ description "
+ The ec555 board comes in four different flavours, 2MB flash-1MB RAM,
+ 4MB flash-2MB RAM, 8MB flash-4MB RAM and 8MB flash-8MB RAM. This option
+ selects the board variant."
+ }
+
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
display "Number of communication channels on the board"
flavor data
calculated 2
description "
@@ -251,21 +262,37 @@
cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
display "Memory layout linker script fragment"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
- calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_ec555_ram.ldi>" : \
- "<pkgconf/mlt_powerpc_ec555_rom.ldi>" }
+ calculated { CYG_HAL_STARTUP == "RAM" ? \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi>" : \
+ "<pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi>" : \
+ "<pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi>"
+ }
}
cdl_option CYGHWR_MEMORY_LAYOUT_H {
display "Memory layout header file"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_H
- calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_ec555_ram.h>" : \
- "<pkgconf/mlt_powerpc_ec555_rom.h>" }
+ calculated { CYG_HAL_STARTUP == "RAM" ? \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_ram.h>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_ram.h>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_ram.h>" : \
+ "<pkgconf/mlt_powerpc_ec555_f08_s08_ram.h>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_rom.h>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_rom.h>" : \
+ CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_rom.h>" : \
+ "<pkgconf/mlt_powerpc_ec555_f08_s08_rom.h>"
+ }
}
}
cdl_option CYGSEM_HAL_ROM_MONITOR {
display "Behave as a ROM monitor"
Index: current/include/plf_intr.h
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/hal/powerpc/ec555/current/include/plf_intr.h,v
retrieving revision 1.1.1.2
retrieving revision 1.2
diff -u -5 -r1.1.1.2 -r1.2
Index: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,54 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x0fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0x1fffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_for_rom) [];
+#endif
+#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom))
+#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1100000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,37 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x000fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x001fffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = 0x01000000;
+ CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000;
+
+ SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA)
+ SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+ CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h 8 Apr 2004 20:17:46 -0000 1.1
@@ -0,0 +1,48 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x0fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0x1fffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1100000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,42 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x000fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x001fffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA)
+ SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
+
+ SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table))
+ SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA)
+
+ . = 0x1000000;
+
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+
+ CYG_LABEL_DEFN(__heap1) = ALIGN(0x8);
+
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,54 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x1fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0x3fffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_for_rom) [];
+#endif
+#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom))
+#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1200000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,37 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x001fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x003fffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = 0x01000000;
+ CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000;
+
+ SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA)
+ SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+ CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h 8 Apr 2004 20:17:46 -0000 1.1
@@ -0,0 +1,48 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x1fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0x3fffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1200000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,42 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x001fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x003fffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA)
+ SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
+
+ SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table))
+ SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA)
+
+ . = 0x1000000;
+
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+
+ CYG_LABEL_DEFN(__heap1) = ALIGN(0x8);
+
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,54 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x3fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0x7fffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_for_rom) [];
+#endif
+#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom))
+#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1400000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,37 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x003fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x007fffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = 0x01000000;
+ CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000;
+
+ SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA)
+ SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+ CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h 8 Apr 2004 20:17:46 -0000 1.1
@@ -0,0 +1,48 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x3fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0x7fffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1400000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,42 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x003fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x007fffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA)
+ SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
+
+ SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table))
+ SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA)
+
+ . = 0x1000000;
+
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+
+ CYG_LABEL_DEFN(__heap1) = ALIGN(0x8);
+
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,54 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x7fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0xffffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_for_rom) [];
+#endif
+#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom))
+#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1800000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,37 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x007fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x00ffffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = 0x01000000;
+ CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000;
+
+ SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA)
+ SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+ CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h 8 Apr 2004 20:17:46 -0000 1.1
@@ -0,0 +1,48 @@
+// eCos memory layout - Fri Oct 20 10:25:48 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+#define CYGMEM_REGION_rom (0x000000)
+#define CYGMEM_REGION_rom_SIZE (0x06ffff)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#define CYGMEM_REGION_ram (0x1000000)
+#define CYGMEM_REGION_ram_SIZE (0x7fffff)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_iram (0x3f9800)
+#define CYGMEM_REGION_iram_SIZE (0x006800)
+#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_eflash (0x2000000)
+#define CYGMEM_REGION_eflash_SIZE (0xffffff)
+#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vectors) [];
+#endif
+#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
+#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
+#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
+#endif
+#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
+#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x1800000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi 19 Apr 2004 07:34:26 -0000 1.2
@@ -0,0 +1,42 @@
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
+ ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x007fffff /* external RAM */
+ iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
+ eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x00ffffff /* external FLASH */
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+
+ CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
+
+ SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA)
+ SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+ SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
+
+ . = 0x3f9800;
+ CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
+ CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
+ . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
+
+ SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table))
+ SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA)
+
+ . = 0x1000000;
+
+ SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
+
+ CYG_LABEL_DEFN(__heap1) = ALIGN(0x8);
+
+ SECTIONS_END
+}
Index: current/include/pkgconf/mlt_powerpc_ec555_ram.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_ram.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_ram.h
--- current/include/pkgconf/mlt_powerpc_ec555_ram.h 7 Jun 2003 09:01:35 -0000 1.1.1.1
+++ /dev/null 1 Jan 1970 00:00:00 -0000
@@ -1,48 +0,0 @@
-// eCos memory layout - Fri Oct 20 10:25:48 2000
-
-// This is a generated file - do not edit
-
-#ifndef __ASSEMBLER__
-#include <cyg/infra/cyg_type.h>
-#include <stddef.h>
-#endif
-
-#define CYGMEM_REGION_rom (0x000000)
-#define CYGMEM_REGION_rom_SIZE (0x06ffff)
-#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
-
-#define CYGMEM_REGION_ram (0x400000)
-#define CYGMEM_REGION_ram_SIZE (0x0fffff)
-#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
-
-#define CYGMEM_REGION_iram (0x3f9800)
-#define CYGMEM_REGION_iram_SIZE (0x006800)
-#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
-
-#define CYGMEM_REGION_eflash (0x800000)
-#define CYGMEM_REGION_eflash_SIZE (0x1fffff)
-#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__reserved_vectors) [];
-#endif
-#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
-#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
-#endif
-#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
-#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
-#endif
-#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
-#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__heap1) [];
-#endif
-#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
-#define CYGMEM_SECTION_heap1_SIZE (0x00500000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_ram.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_ram.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_ram.ldi
--- current/include/pkgconf/mlt_powerpc_ec555_ram.ldi 7 Jun 2003 09:01:35 -0000 1.1.1.1
+++ /dev/null 1 Jan 1970 00:00:00 -0000
@@ -1,35 +0,0 @@
-
-#include <cyg/infra/cyg_type.inc>
-
-MEMORY
-{
- rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
- ram(WA) : ORIGIN = 0x00400000, LENGTH = 0x000fffff /* external RAM */
- iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
- eflash(RXIW) : ORIGIN = 0x00800000, LENGTH = 0x001fffff /* external FLASH */
-}
-
-SECTIONS
-{
- SECTIONS_BEGIN
- CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
-
- . = 0x3f9800;
- CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
- . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
- CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
- . = 0x00400000;
-
- SECTION_vectors (ram, 0x00400000, LMA_EQ_VMA)
- SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
- SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
- SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
- SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
- SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
- CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
- SECTIONS_END
-}
Index: current/include/pkgconf/mlt_powerpc_ec555_rom.h
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_rom.h
diff -N current/include/pkgconf/mlt_powerpc_ec555_rom.h
--- current/include/pkgconf/mlt_powerpc_ec555_rom.h 7 Jun 2003 09:01:35 -0000 1.1.1.1
+++ /dev/null 1 Jan 1970 00:00:00 -0000
@@ -1,48 +0,0 @@
-// eCos memory layout - Fri Oct 20 10:25:48 2000
-
-// This is a generated file - do not edit
-
-#ifndef __ASSEMBLER__
-#include <cyg/infra/cyg_type.h>
-#include <stddef.h>
-#endif
-
-#define CYGMEM_REGION_rom (0x000000)
-#define CYGMEM_REGION_rom_SIZE (0x06ffff)
-#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO)
-
-#define CYGMEM_REGION_ram (0x400000)
-#define CYGMEM_REGION_ram_SIZE (0x0fffff)
-#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
-
-#define CYGMEM_REGION_iram (0x3f9800)
-#define CYGMEM_REGION_iram_SIZE (0x006800)
-#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
-
-#define CYGMEM_REGION_eflash (0x800000)
-#define CYGMEM_REGION_eflash_SIZE (0x1fffff)
-#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__reserved_vectors) [];
-#endif
-#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
-#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
-#endif
-#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
-#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
-#endif
-#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
-#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
-
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__heap1) [];
-#endif
-#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
-#define CYGMEM_SECTION_heap1_SIZE (0x00500000 - (size_t) CYG_LABEL_NAME (__heap1))
Index: current/include/pkgconf/mlt_powerpc_ec555_rom.ldi
===================================================================
RCS file: current/include/pkgconf/mlt_powerpc_ec555_rom.ldi
diff -N current/include/pkgconf/mlt_powerpc_ec555_rom.ldi
--- current/include/pkgconf/mlt_powerpc_ec555_rom.ldi 7 Jun 2003 09:01:35 -0000 1.1.1.1
+++ /dev/null 1 Jan 1970 00:00:00 -0000
@@ -1,41 +0,0 @@
-
-#include <cyg/infra/cyg_type.inc>
-
-MEMORY
-{
- rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */
- ram(WA) : ORIGIN = 0x00400000, LENGTH = 0x000fffff /* external RAM */
- iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */
- eflash(RXIW) : ORIGIN = 0x00800000, LENGTH = 0x001fffff /* external FLASH */
-}
-
-SECTIONS
-{
- SECTIONS_BEGIN
-
- CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
-
- SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA)
- SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA)
- SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
- SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
-
- . = 0x3f9800;
- CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
- . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
- CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
- . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
-
- SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table))
- SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA)
- SECTION_bss (iram, ALIGN (0x10), LMA_EQ_VMA)
-
- . = 0x400000;
-
- CYG_LABEL_DEFN(__heap1) = ALIGN(0x8);
-
- SECTIONS_END
-}
Index: current/src/ec555.S
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/hal/powerpc/ec555/current/src/ec555.S,v
retrieving revision 1.1.1.2
retrieving revision 1.5
diff -u -5 -r1.1.1.2 -r1.5
--- current/src/ec555.S 24 Nov 2003 19:45:51 -0000 1.1.1.2
+++ current/src/ec555.S 19 Apr 2004 07:34:26 -0000 1.5
@@ -63,15 +63,45 @@
## FIXME
## The following probably belongs in the variant hal rather than the board specifics ...
#ifdef CYGPKG_DEVICES_WATCHDOG_MPC5xx
#include <pkgconf/devices_watchdog_mpc5xx.h>
-#define CYG_SYPCR 0x0000ff8d | (CYGNUM_DEVICES_WATCHDOG_POWERPC_MPC5XX_RELOAD << 16) | CYGDAT_DEVICES_WATCHDOG_POWERPC_MPC5XX_PRESCALE
+#define CYG_SYPCR 0x0000ff8e | (CYGNUM_DEVICES_WATCHDOG_POWERPC_MPC5XX_RELOAD << 16) | CYGDAT_DEVICES_WATCHDOG_POWERPC_MPC5XX_PRESCALE
#else
#define CYG_SYPCR 0x0000ff88
#endif
+#define ADDRESS_MASK_1MB 0xfff00000
+#define ADDRESS_MASK_2MB 0xffe00000
+#define ADDRESS_MASK_4MB 0xffc00000
+#define ADDRESS_MASK_8MB 0xff800000
+#define ADDRESS_MASK_16MB 0xff000000
+
+#define EC555_RAM_BASE_ADDRESS 0x01000000
+#define EC555_FLASH_BASE_ADDRESS 0x02000000
+#define EC555_CS2_BASE_ADDRESS 0x04000000
+#define EC555_CS3_BASE_ADDRESS 0x08000000
+
+#if defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F02_S01)
+#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_1MB
+#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_2MB
+#elif defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F04_S02)
+#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_2MB
+#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_4MB
+#elif defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F08_S04)
+#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_4MB
+#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_8MB
+#elif defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F08_S08)
+#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_8MB
+#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_16MB
+#else
+#error "EC555 Board variant unspecified"
+#endif
+
+#define EC555_CS2_ADDRESS_MASK 0xffff8000
+#define EC555_CS3_ADDRESS_MASK 0xffff8000
+
#------------------------------------------------------------------------------
.globl hal_hardware_init
hal_hardware_init:
#if defined(CYGPKG_HAL_POWERPC_EC555) && defined(CYGPKG_HAL_POWERPC_MPC5xx)
@@ -116,47 +146,57 @@
sth r4, (CYGARC_REG_IMM_COLIR-CYGARC_REG_IMM_BASE)(r3)
// Set up the memory map
// Do NOT write protect the flash memory, flash drivers won't work
// if we do
- lwi r4, 0x00800003
+
+ // flash banks
+ lwi r4, (EC555_FLASH_BASE_ADDRESS | 0x00000003)
stw r4, (CYGARC_REG_IMM_BR0-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0xffc00530
+ lwi r4, (EC555_FLASH_ADDRESS_MASK | 0x00000530)
stw r4, (CYGARC_REG_IMM_OR0-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0x00400011
+
+ // ram banks
+ lwi r4, (EC555_RAM_BASE_ADDRESS | 0x00000011)
stw r4, (CYGARC_REG_IMM_BR1-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0xfff00000
+ lwi r4, (EC555_RAM_ADDRESS_MASK | 0x00000000)
stw r4, (CYGARC_REG_IMM_OR1-CYGARC_REG_IMM_BASE)(r3)
#endif
#ifdef CYGPKG_DEVS_ETH_POWERPC_EC555
-
- lwi r4, (CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_BASE & 0xffff0000) | 0x00000803
#if (CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_CS == 2)
+ lwi r4, (EC555_CS2_BASE_ADDRESS | 0x00000803)
stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3)
lwi r4, 0xffff8e60
stw r4, (CYGARC_REG_IMM_OR2-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0
+
+ lwi r4, EC555_CS3_BASE_ADDRESS
stw r4, (CYGARC_REG_IMM_BR3-CYGARC_REG_IMM_BASE)(r3)
+ lwi r4, EC555_CS3_ADDRESS_MASK
+ stw r4, (CYGARC_REG_IMM_OR3-CYGARC_REG_IMM_BASE)(r3)
#elif (CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_CS == 3)
+ lwi r4, EC555_CS2_BASE_ADDRESS
+ stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3)
+ lwi r4, EC555_CS2_ADDRESS_MASK
+ stw r4, (CYGARC_REG_IMM_OR2-CYGARC_REG_IMM_BASE)(r3)
+
+ lwi r4, (EC555_CS3_BASE_ADDRESS | 0x00000803)
stw r4, (CYGARC_REG_IMM_BR3-CYGARC_REG_IMM_BASE)(r3)
lwi r4, 0xffff8e60
stw r4, (CYGARC_REG_IMM_OR3-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0
- stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3)
#else
#error "Invalid chip select for ethernet card specified"
#endif
-
#else
- lwi r4, 0x00c00000
+ lwi r4, EC555_CS2_BASE_ADDRESS
stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0xffff8000
+ lwi r4, EC555_CS2_ADDRESS_MASK
stw r4, (CYGARC_REG_IMM_OR2-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0x00e00000
+
+ lwi r4, EC555_CS3_BASE_ADDRESS
stw r4, (CYGARC_REG_IMM_BR3-CYGARC_REG_IMM_BASE)(r3)
- lwi r4, 0xffff8000
+ lwi r4, EC555_CS3_ADDRESS_MASK
stw r4, (CYGARC_REG_IMM_OR3-CYGARC_REG_IMM_BASE)(r3)
#endif
#if defined(CYGSEM_HAL_POWERPC_MPC5XX_IFLASH_DUAL_MAP)
lwi r4, 1
@@ -165,12 +205,12 @@
#endif
stw r4, (CYGARC_REG_IMM_DMBR-CYGARC_REG_IMM_BASE)(r3)
lwi r4, 0
stw r4, (CYGARC_REG_IMM_DMOR-CYGARC_REG_IMM_BASE)(r3)
- // Enable the time base and set the freeze flag
- lwi r4, 0xc3
+ // Enable the time base, but do _not_ set the freeze flag
+ lwi r4, 0xc1
sth r4, (CYGARC_REG_IMM_TBSCR-CYGARC_REG_IMM_BASE)(r3)
// RTC is clocked by 4MHz crystal, set the freeze flag
lwi r4, 0xd2
sth r4, (CYGARC_REG_IMM_RTCSC-CYGARC_REG_IMM_BASE)(r3)
Index: current/src/hal_diag.c
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/hal/powerpc/ec555/current/src/hal_diag.c,v
retrieving revision 1.1.1.2
retrieving revision 1.2
diff -u -5 -r1.1.1.2 -r1.2
Index: current/src/plf_misc.c
===================================================================
RCS file: /cvs/o3s/software/ecos/packages/hal/powerpc/ec555/current/src/plf_misc.c,v
retrieving revision 1.1.1.1
retrieving revision 1.3
diff -u -5 -r1.1.1.1 -r1.3