diff --exclude CVS -Naurp ecos/ecos/packages/ChangeLog ecos-mv2p/ecos/packages/ChangeLog --- ecos/ecos/packages/ChangeLog 2004-10-05 14:53:39.000000000 +0200 +++ ecos-mv2p/ecos/packages/ChangeLog 2004-10-14 18:10:16.000000000 +0200 @@ -1,3 +1,10 @@ +2004-10-14 Wouter Cloetens + + * ecos.db: New platform: Memec FG456 Virtex-II Pro evaluation board with + P160 communications module 1 and Memec Linux reference design. + + * ecos.db: PowerPC 405 watchdog support. + 2004-10-5 Andrea Michelotti * ecos.db: Added atmel jtst watchdog support diff --exclude CVS -Naurp ecos/ecos/packages/devs/eth/powerpc/mv2p/current/ChangeLog ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/ChangeLog --- ecos/ecos/packages/devs/eth/powerpc/mv2p/current/ChangeLog 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/ChangeLog 2004-10-15 11:34:45.000000000 +0200 @@ -0,0 +1,39 @@ +2004-10-14 Wouter Cloetens + + * New package - support for Memec EMAC. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== diff --exclude CVS -Naurp ecos/ecos/packages/devs/eth/powerpc/mv2p/current/cdl/mv2p_eth_drivers.cdl ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/cdl/mv2p_eth_drivers.cdl --- ecos/ecos/packages/devs/eth/powerpc/mv2p/current/cdl/mv2p_eth_drivers.cdl 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/cdl/mv2p_eth_drivers.cdl 2004-10-15 11:45:17.000000000 +0200 @@ -0,0 +1,133 @@ +# ==================================================================== +# +# mv2p_eth_drivers.cdl +# +# Ethernet drivers - platform dependent support for Memec OPB-ETHCTRL +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2002, 2004 Mind n.v. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: +# Date: 2004-10-14 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_ETH_POWERPC_MV2P { + display "Memec MV2P ethernet driver" + + parent CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_HAL_POWERPC + active_if CYGPKG_HAL_POWERPC_MV2P + + implements CYGHWR_NET_DRIVERS + implements CYGHWR_NET_DRIVER_ETH0 + implements CYGINT_IO_ETH_MULTICAST + include_dir . + include_files ; # none _exported_ whatsoever + + description "Fast ethernet driver for PowerPC MPC8xxT boards." + compile -library=libextras.a if_mv2p.c + + cdl_option CYGNUM_DEVS_ETH_POWERPC_MV2P_BUFSIZE { + display "Buffer size" + flavor data + default_value 1520 + description " + This option specifies the size of the internal buffers used + for the PowerPC MV2P/ethernet device." + } + + cdl_option CYGNUM_DEVS_ETH_POWERPC_MV2P_TxNUM { + display "Number of output buffers" + flavor data + legal_values 2 to 64 + default_value 4 + description " + This option specifies the number of output buffer packets + to be used for the PowerPC MV2P/ethernet device." + } + + cdl_option CYGNUM_DEVS_ETH_POWERPC_MV2P_RxNUM { + display "Number of input buffers" + flavor data + legal_values 2 to 64 + default_value 4 + description " + This option specifies the number of input buffer packets + to be used for the PowerPC MV2P/ethernet device." + } + + cdl_component CYGSEM_DEVS_ETH_POWERPC_MV2P_RESET_PHY { + display "Reset and reconfigure PHY" + flavor bool + default_value 0 + description " + This option allows control over the physical transceiver" + + cdl_option CYGNUM_DEVS_ETH_POWERPC_MV2P_LINK_MODE { + display "Initial link mode" + flavor data + legal_values { "10Mb" "100Mb" "Auto" } + default_value { "Auto" } + description " + This option specifies initial mode for the physical + link. The PHY will be reset and then set to this mode." + } + } + + cdl_component CYGPKG_DEVS_ETH_POWERPC_MV2P_OPTIONS { + display "MPC8xx MV2P ethernet driver build options" + flavor none + no_define + + cdl_option CYGPKG_DEVS_ETH_POWERPC_MV2P_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "-D_KERNEL -D__ECOS" } + description " + This option modifies the set of compiler flags for + building the MPC8xx MV2P ethernet driver package. These flags are used in addition + to the set of global flags." + } + } +} diff --exclude CVS -Naurp ecos/ecos/packages/devs/eth/powerpc/mv2p/current/src/if_mv2p.c ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/src/if_mv2p.c --- ecos/ecos/packages/devs/eth/powerpc/mv2p/current/src/if_mv2p.c 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/src/if_mv2p.c 2004-10-14 17:44:27.000000000 +0200 @@ -0,0 +1,760 @@ +//========================================================================== +// +// dev/if_mv2p.c +// +// Ethernet device driver for Memec Design OPB-ETHCTRL +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2004-10-14 +// Purpose: +// Description: hardware driver for Memec OPB-ETHCTRL +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +// Ethernet device driver for Memec Design OPB-ETHCTRL + +#include +#include +#include + +#ifdef CYGPKG_NET +#include +#endif + +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "opb_ethctrl.h" + +// Align buffers on a cache boundary +static struct eth_bd mv2p_eth_rxbd[CYGNUM_DEVS_ETH_POWERPC_MV2P_RxNUM]; +static struct eth_bd mv2p_eth_txbd[CYGNUM_DEVS_ETH_POWERPC_MV2P_TxNUM]; + +static struct mv2p_eth_info mv2p_eth0_info; +static unsigned char _default_enaddr[] = { 0x08, 0x00, 0x3E, 0x40, 0x7A, 0xBA}; +static unsigned char enaddr[6]; +#ifdef CYGPKG_REDBOOT +#include +#ifdef CYGSEM_REDBOOT_FLASH_CONFIG +#include +#include +RedBoot_config_option("Network hardware address [MAC]", + eth_esa, + ALWAYS_ENABLED, true, + CONFIG_ESA, 0 + ); +#endif +#endif + +#define os_printf diag_printf + +// For fetching the ESA from RedBoot +#include +#ifndef CONFIG_ESA +#define CONFIG_ESA 6 +#endif + +ETH_DRV_SC(mv2p_eth0_sc, + &mv2p_eth0_info, // Driver specific data + "eth0", // Name for this interface + mv2p_eth_start, + mv2p_eth_stop, + mv2p_eth_control, + mv2p_eth_can_send, + mv2p_eth_send, + mv2p_eth_recv, + mv2p_eth_deliver, + mv2p_eth_int, + mv2p_eth_int_vector); + +NETDEVTAB_ENTRY(mv2p_netdev, + "mv2p_eth", + mv2p_eth_init, + &mv2p_eth0_sc); + +#ifdef CYGINT_IO_ETH_INT_SUPPORT_REQUIRED +static cyg_interrupt mv2p_eth_tx_interrupt; +static cyg_handle_t mv2p_eth_tx_interrupt_handle; +static cyg_interrupt mv2p_eth_rx_interrupt; +static cyg_handle_t mv2p_eth_rx_interrupt_handle; +#endif // CYGINT_IO_ETH_INT_SUPPORT_REQUIRED +static void mv2p_eth_int(struct eth_drv_sc *data); + +// HACK +#define MV2P_ETH_PHY 0 +// HACK + +#ifndef MV2P_ETH_PHY +#error MV2P_ETH_PHY must be defined +#endif + +#ifndef MV2P_ETH_RESET_PHY +#define MV2P_ETH_RESET_PHY() +#endif + +#ifndef MV2P_EPPC_BD_OFFSET +#define MV2P_EPPC_BD_OFFSET CYGNUM_DEVS_ETH_POWERPC_MV2P_BD_OFFSET +#endif + +// LED activity [exclusive of hardware bits] +#ifndef _get_leds +externC int _mv2p_get_leds(void); +externC void _mv2p_set_leds(int); +#define _get_leds() _mv2p_get_leds() +#define _set_leds(v) _mv2p_set_leds(v) +#endif +#ifndef LED_TxACTIVE +#define LED_TxACTIVE 0 +#define LED_RxACTIVE 1 +#define LED_IntACTIVE 2 +#endif + +static void +set_led(int bit) +{ + _set_leds(_get_leds() | (1<iEvent = iEvent_MII; + mv2p->MiiData = MII_Start | MII_Write | MII_Phy(addr) | MII_Reg(reg) | MII_TA | data; + while (!(mv2p->iEvent & iEvent_MII) && (--timeout > 0)) ; +} + +static bool +phy_read(int reg, int addr, unsigned short *val) +{ + volatile EPPC *eppc = (volatile EPPC *)eppc_base(); + volatile struct mv2p *mv2p = (volatile struct mv2p *)((unsigned char *)eppc + MV2P_OFFSET); + int timeout = 0x100000; + + mv2p->iEvent = iEvent_MII; + mv2p->MiiData = MII_Start | MII_Read | MII_Phy(addr) | MII_Reg(reg) | MII_TA; + while (!(mv2p->iEvent & iEvent_MII)) { + if (--timeout <= 0) { + return false; + } + } + *val = mv2p->MiiData & 0x0000FFFF; + return true; +} +#endif // CYGSEM_DEVS_ETH_POWERPC_MV2P_RESET_PHY + +// +// [re]Initialize the ethernet controller +// Done separately since shutting down the device requires a +// full reconfiguration when re-enabling. +// when +static bool +mv2p_eth_reset(struct eth_drv_sc *sc, unsigned char *enaddr, int flags) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + volatile struct opb_ethctrl *opb_eth = qi->opb_eth; + struct eth_bd *rxbd, *txbd; + unsigned char *RxBUF; + int i, int_state; + + // Ignore unless device is idle/stopped + if ((opb_eth->rx_cfg & OPB_ETH_RX_CFG_ENABLE) != 0) { + return true; + } + + // Make sure interrupts are off while we mess with the device + HAL_DISABLE_INTERRUPTS(int_state); + + // Flush FIFOs - start as clean as possible + opb_eth->fifo_flush = OPB_ETH_FIFO_FLUSH_RX | OPB_ETH_FIFO_FLUSH_TX; + opb_eth->fifo_cfg |= OPB_ETH_FIFO_CFG_TX_LE | OPB_ETH_FIFO_CFG_RX_LE; + + txbd = mv2p_eth_txbd; + rxbd = mv2p_eth_rxbd; + qi->txbd = qi->tx_next = qi->tb_next = txbd; + qi->rxbd = qi->rx_next = qi->rb_next = rxbd; + qi->txactive = 0; + + // setup buffer descriptors + RxBUF = (unsigned char *)_MV2P_BRAM; // Buffers must live in special BRAM space + for (i = 0; i < CYGNUM_DEVS_ETH_POWERPC_MV2P_RxNUM; i++) { + rxbd->len = 0; + rxbd->buf = RxBUF; + rxbd->status = BD_FREE; + RxBUF += CYGNUM_DEVS_ETH_POWERPC_MV2P_BUFSIZE; + rxbd->next = (rxbd+1); + rxbd++; + } + rxbd--; + rxbd->next = mv2p_eth_rxbd; + for (i = 0; i < CYGNUM_DEVS_ETH_POWERPC_MV2P_TxNUM; i++) { + txbd->len = 0; + txbd->buf = RxBUF; + txbd->status = BD_FREE; + RxBUF += CYGNUM_DEVS_ETH_POWERPC_MV2P_BUFSIZE; + txbd->next = (txbd+1); + txbd++; + } + txbd--; + txbd->next = mv2p_eth_txbd; + + // Group address hash + opb_eth->address_hash[0] = 0; + opb_eth->address_hash[1] = 0; + + // Device physical address + opb_eth->hwaddr[0] = (enaddr[2]<<24) | (enaddr[3]<<16) | (enaddr[4]<<8) | enaddr[5]; + opb_eth->hwaddr[1] = (enaddr[0]<<8) | enaddr[1]; + + // Clear any interrupts + opb_eth->int_stat = 0xFFFFFFFF; + + // Configure transmitter & transmitter + opb_eth->max_rx_frame = IEEE_8023_MAX_FRAME; // Largest possible ethernet frame + opb_eth->max_tx_frame = IEEE_8023_MAX_FRAME; + opb_eth->timing_cfg = 0x16170F; + + // Enable device + rxbd = (struct eth_bd *)qi->rx_next; + opb_eth->rx_frame_addr = (unsigned long )(rxbd->buf + 0x00100000); + rxbd->status &= ~BD_FREE; + opb_eth->rx_cfg |= OPB_ETH_RX_CFG_ENABLE; + qi->opb_eth->tx_frame_addr = (unsigned long)(txbd->buf + 0x00100000); + qi->opb_eth->tx_frame_len = 0; + opb_eth->tx_cfg = OPB_ETH_TX_CFG_ENABLE | OPB_ETH_TX_CFG_PAD; + +#ifdef CYGINT_IO_ETH_INT_SUPPORT_REQUIRED + // Set up for interrupts + opb_eth->int_enable = OPB_ETH_INT_STAT_RXBX | + OPB_ETH_INT_STAT_TX | + OPB_ETH_INT_STAT_TXBX; + opb_eth->int_cfg = 0; + +#endif + + // Set LED state + clear_led(LED_TxACTIVE); + clear_led(LED_RxACTIVE); + + HAL_RESTORE_INTERRUPTS(int_state); + return true; +} + +// +// Initialize the interface - performed at system startup +// This function must set up the interface, including arranging to +// handle interrupts, etc, so that it may be "started" cheaply later. +// +static bool +mv2p_eth_init(struct cyg_netdevtab_entry *tab) +{ + struct eth_drv_sc *sc = (struct eth_drv_sc *)tab->device_instance; + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + bool esa_ok; +#ifdef CYGSEM_DEVS_ETH_POWERPC_MV2P_RESET_PHY + int phy_timeout = 5*1000; // Wait 5 seconds max for link to clear + bool phy_ok; + unsigned short phy_state = 0; +#endif + + qi->opb_eth = (volatile struct opb_ethctrl *)_MV2P_ETH; + mv2p_eth_stop(sc); // Make sure it's not running yet + +#ifdef CYGINT_IO_ETH_INT_SUPPORT_REQUIRED + // Set up to handle interrupts + cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EMAC_TX, + 99, + (cyg_addrword_t)sc, // Data item passed to interrupt handler + (cyg_ISR_t *)mv2p_eth_isr, + (cyg_DSR_t *)eth_drv_dsr, + &mv2p_eth_tx_interrupt_handle, + &mv2p_eth_tx_interrupt); + cyg_drv_interrupt_attach(mv2p_eth_tx_interrupt_handle); + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EMAC_TX); + cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EMAC_TX); + cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EMAC_RX, + 99, + (cyg_addrword_t)sc, // Data item passed to interrupt handler + (cyg_ISR_t *)mv2p_eth_isr, + (cyg_DSR_t *)eth_drv_dsr, + &mv2p_eth_rx_interrupt_handle, + &mv2p_eth_rx_interrupt); + cyg_drv_interrupt_attach(mv2p_eth_rx_interrupt_handle); + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EMAC_RX); + cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EMAC_RX); +#endif + + // Get physical device address +#ifdef CYGPKG_REDBOOT +#ifdef CYGSEM_REDBOOT_FLASH_CONFIG + esa_ok = flash_get_config("eth_esa", enaddr, CONFIG_ESA); +#else + esa_ok = false; +#endif +#else + esa_ok = CYGACC_CALL_IF_FLASH_CFG_OP(CYGNUM_CALL_IF_FLASH_CFG_GET, + "eth_esa", enaddr, CONFIG_ESA); +#endif + if (!esa_ok) { + // Can't figure out ESA + os_printf("MV2P_ETH - Warning! ESA unknown\n"); + memcpy(&enaddr, &_default_enaddr, sizeof(enaddr)); + } + + // Configure the device + if (!mv2p_eth_reset(sc, enaddr, 0)) { + return false; + } + +#ifdef CYGSEM_DEVS_ETH_POWERPC_MV2P_RESET_PHY + // Reset PHY (transceiver) + MV2P_ETH_RESET_PHY(); + + phy_ok = 0; + if (phy_read(PHY_BMSR, MV2P_ETH_PHY, &phy_state)) { + if ((phy_state & PHY_BMSR_LINK) != PHY_BMSR_LINK) { + unsigned short reset_mode; + int i; + phy_write(PHY_BMCR, MV2P_ETH_PHY, PHY_BMCR_RESET); + for (i = 0; i < 10; i++) { + phy_ok = phy_read(PHY_BMCR, MV2P_ETH_PHY, &phy_state); + if (!phy_ok) break; + if (!(phy_state & PHY_BMCR_RESET)) break; + } + if (!phy_ok || (phy_state & PHY_BMCR_RESET)) { + os_printf("MV2P: Can't get PHY unit to soft reset: %x\n", phy_state); + return false; + } + + mv2p->iEvent = 0xFFFFFFFF; // Clear all interrupts + reset_mode = PHY_BMCR_RESTART; +#ifdef CYGNUM_DEVS_ETH_POWERPC_MV2P_LINK_MODE_Auto + reset_mode |= PHY_BMCR_AUTO_NEG; +#endif +#ifdef CYGNUM_DEVS_ETH_POWERPC_MV2P_LINK_MODE_100Mb + reset_mode |= PHY_BMCR_100MB; +#endif + phy_write(PHY_BMCR, MV2P_ETH_PHY, reset_mode); + while (phy_timeout-- >= 0) { + int ev = mv2p->iEvent; + unsigned short state; + mv2p->iEvent = ev; + if (ev & iEvent_MII) { + phy_ok = phy_read(PHY_BMSR, MV2P_ETH_PHY, &state); + if (phy_ok && (state & PHY_BMSR_LINK)) { + break; + } else { + CYGACC_CALL_IF_DELAY_US(10000); // 10ms + } + } + } + if (phy_timeout <= 0) { + os_printf("** MV2P Warning: PHY LINK UP failed\n"); + } + } + else { + os_printf("** MV2P Info: PHY LINK already UP \n"); + } + } +#endif // CYGSEM_DEVS_ETH_POWERPC_MV2P_RESET_PHY + + // Initialize upper level driver + (sc->funs->eth_drv->init)(sc, (unsigned char *)&enaddr); + + return true; +} + +// +// This function is called to shut down the interface. +// +static void +mv2p_eth_stop(struct eth_drv_sc *sc) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + + // Disable the device! + qi->opb_eth->rx_cfg &= ~OPB_ETH_RX_CFG_ENABLE; + qi->opb_eth->tx_cfg &= ~OPB_ETH_TX_CFG_ENABLE; +} + +// +// This function is called to "start up" the interface. It may be called +// multiple times, even when the hardware is already running. It will be +// called whenever something "hardware oriented" changes and should leave +// the hardware ready to send/receive packets. +// +static void +mv2p_eth_start(struct eth_drv_sc *sc, unsigned char *enaddr, int flags) +{ + // Enable the device! + mv2p_eth_reset(sc, enaddr, flags); +} + +// +// This function is called for low level "control" operations +// +static int +mv2p_eth_control(struct eth_drv_sc *sc, unsigned long key, + void *data, int length) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + volatile struct opb_ethctrl *opb_eth = qi->opb_eth; + + switch (key) { + case ETH_DRV_SET_MAC_ADDRESS: + return 0; + break; +#ifdef ETH_DRV_SET_MC_ALL + case ETH_DRV_SET_MC_ALL: + case ETH_DRV_SET_MC_LIST: + opb_eth->address_hash[0] = 0xFFFFFFFF; + opb_eth->address_hash[1] = 0xFFFFFFFF; + return 0; + break; +#endif + default: + return 1; + break; + } +} + +// +// This function is called to see if another packet can be sent. +// It should return the number of packets which can be handled. +// Zero should be returned if the interface is busy and can not send any more. +// +static int +mv2p_eth_can_send(struct eth_drv_sc *sc) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + + return (qi->txactive < CYGNUM_DEVS_ETH_POWERPC_MV2P_TxNUM); +} + +// +// These routine is called to send data to the hardware. + +#define max(a,b) ((a) > (b)) ? (a) : (b) + +static void +mv2p_eth_queue(struct mv2p_eth_info *qi, struct eth_bd *bd) +{ + int len; + + if (qi->txbusy == 0) { + len = max(bd->len, 64); + qi->opb_eth->tx_frame_addr = (unsigned long)(bd->buf + 0x00100000); + qi->opb_eth->tx_frame_len = len; + qi->txbusy = 1; + } +} + +static void +mv2p_eth_send(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len, + int total_len, unsigned long key) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + volatile struct eth_bd *txbd, *txfirst; + char *bp; + int i, txindex; + + // Find a free buffer + txbd = txfirst = qi->txbd; + if ((txbd->status & BD_FREE) == 0) { +#ifdef CYGPKG_NET + panic ("No free xmit buffers"); +#else + os_printf("MV2P Ethernet: No free xmit buffers\n"); +#endif + return; + } + // Set up buffer + bp = txbd->buf; + for (i = 0; i < sg_len; i++) { + memcpy((void *)bp, (void *)sg_list[i].buf, sg_list[i].len); + bp += sg_list[i].len; + } + txbd->len = total_len; + txindex = ((unsigned long)txbd - (unsigned long)mv2p_eth_txbd) / sizeof(*txbd); + qi->txkey[txindex] = key; + // Send it on it's way + txbd->status &= ~(BD_FREE | BD_DONE | BD_BX); + qi->txactive++; + mv2p_eth_queue(qi, (struct eth_bd *)txbd); + set_led(LED_TxACTIVE); + // Remember the next buffer to try + qi->txbd = txbd->next; +} + +// +// This function is called when there has been a Tx interrupt (event) +// This interrupt indicates only that the data for the buffer has been +// moved onto the controller. A later interrupt will indicate when +// the actual packet has been sent on the wire. +// +static void +mv2p_eth_TxBxEvent(struct eth_drv_sc *sc) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + volatile struct eth_bd *txbd; + + txbd = qi->tx_next; + txbd->status |= BD_BX; + txbd = txbd->next; + qi->tx_next = txbd; + qi->txbusy = 0; // Now free to queue another buffer + // See if another buffer is ready to send + if ((txbd->status & BD_FREE) == 0) { + mv2p_eth_queue(qi, (struct eth_bd *)txbd); + } +} + +// +// This function is called when a buffer has been actually transmitted +// to the wire. +// +static void +mv2p_eth_TxEvent(struct eth_drv_sc *sc) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + volatile struct eth_bd *txbd; + int key, txindex; + unsigned long status; + + txbd = qi->tb_next; // Next Tx buffer to be "done" + txindex = ((unsigned long)txbd - (unsigned long)mv2p_eth_txbd) / sizeof(*txbd); + status = qi->opb_eth->tx_stat; +#if 0 + diag_printf("Tx stat: %x\n", status); + diag_dump_buf(txbd->buf, txbd->len); +#endif + if ((key = qi->txkey[txindex]) != 0) { + qi->txkey[txindex] = 0; + (sc->funs->eth_drv->tx_done)(sc, key, 0); + } + if (--qi->txactive == 0) { + clear_led(LED_TxACTIVE); + } + txbd->status = BD_FREE; + qi->tb_next = txbd->next; +} + +// +// This function is called when a packet has been received. It's job is +// to prepare to unload the packet from the hardware. Once the length of +// the packet is known, the upper layer of the driver can be told. When +// the upper layer is ready to unload the packet, the internal function +// 'mv2p_eth_recv' will be called to actually fetch it from the hardware. +// +static void +mv2p_eth_RxEvent(struct eth_drv_sc *sc) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + volatile struct eth_bd *rxbd; + unsigned long stat; + + rxbd = qi->rx_next; + stat = qi->opb_eth->rx_stat; + rxbd->len = stat & 0x0FFF; + qi->rxbd = rxbd; // Save for callback + set_led(LED_RxACTIVE); + (sc->funs->eth_drv->recv)(sc, rxbd->len); + rxbd->status = BD_FREE; + rxbd = rxbd->next; + qi->rx_next = rxbd; +} + +// +// This routine is called when a receive buffer is in the +// last stage of being received. At this point, we need +// to tell the hardware where to put the next buffer. +// +static void +mv2p_eth_RxBxEvent(struct eth_drv_sc *sc) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + volatile struct eth_bd *rxbd; + + rxbd = qi->rb_next; + rxbd->status |= BD_BX; + rxbd = rxbd->next; + qi->rb_next = rxbd; + qi->opb_eth->rx_frame_addr = (unsigned long)(rxbd->buf + 0x00100000); +} + +// +// This function is called as a result of the "eth_drv_recv()" call above. +// It's job is to actually fetch data for a packet from the hardware once +// memory buffers have been allocated for the packet. Note that the buffers +// may come in pieces, using a scatter-gather list. This allows for more +// efficient processing in the upper layers of the stack. +// +static void +mv2p_eth_recv(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + unsigned char *bp; + int i; + + bp = qi->rxbd->buf; +#if 0 + diag_dump_buf(qi->rxbd->buf, qi->rxbd->len); +#endif + for (i = 0; i < sg_len; i++) { + if (sg_list[i].buf != 0) { + memcpy((void *)sg_list[i].buf, bp, sg_list[i].len); + bp += sg_list[i].len; + } + } + qi->rxbd->status = BD_FREE; + clear_led(LED_RxACTIVE); +} + +// +// Interrupt processing +// +static void +mv2p_eth_int(struct eth_drv_sc *sc) +{ + struct mv2p_eth_info *qi = (struct mv2p_eth_info *)sc->driver_private; + unsigned long event; + + while ((event = qi->opb_eth->int_stat) != 0) { + if ((event & OPB_ETH_INT_STAT_TXBX) != 0) { + mv2p_eth_TxBxEvent(sc); + qi->opb_eth->int_stat = OPB_ETH_INT_STAT_TXBX; // Clear interrupt + event &= ~OPB_ETH_INT_STAT_TXBX; + } + if ((event & OPB_ETH_INT_STAT_TX) != 0) { + mv2p_eth_TxEvent(sc); + qi->opb_eth->int_stat = OPB_ETH_INT_STAT_TX; // Clear interrupt + event &= ~OPB_ETH_INT_STAT_TX; + } + if ((event & OPB_ETH_INT_STAT_RX) != 0) { + mv2p_eth_RxEvent(sc); + qi->opb_eth->int_stat = OPB_ETH_INT_STAT_RX; // Clear interrupt + event &= ~OPB_ETH_INT_STAT_RX; + } + if ((event & OPB_ETH_INT_STAT_RXBX) != 0) { + mv2p_eth_RxBxEvent(sc); + qi->opb_eth->int_stat = OPB_ETH_INT_STAT_RXBX; // Clear interrupt + event &= ~OPB_ETH_INT_STAT_RXBX; + } + if ((event & OPB_ETH_INT_STAT_WBE) != 0) { + // Write Bus Error (problem moving received data) + qi->opb_eth->fifo_flush = OPB_ETH_FIFO_FLUSH_RX; + qi->opb_eth->int_stat = OPB_ETH_INT_STAT_WBE; // Clear interrupt + event &= ~OPB_ETH_INT_STAT_WBE; + } + if ((event & OPB_ETH_INT_STAT_RBE) != 0) { + // Read Bus Error (problem moving transmit data) + diag_printf("Tx BE - base: %p, stat: %x, ctl: %x\n", + qi->opb_eth->tx_frame_addr, qi->opb_eth->tx_frame_len, qi->opb_eth->tx_stat); + qi->opb_eth->fifo_flush = OPB_ETH_FIFO_FLUSH_TX; + qi->opb_eth->int_stat = OPB_ETH_INT_STAT_RBE; // Clear interrupt + event &= ~OPB_ETH_INT_STAT_RBE; + } + if (event) { + diag_printf("OPB ETH - unhandled interrupt case: %x\n", event); + qi->opb_eth->int_stat = event; + } + } +} + +// +// Interrupt vector +// +static int +mv2p_eth_int_vector(struct eth_drv_sc *sc) +{ + return (CYGNUM_HAL_INTERRUPT_EMAC_RX); +} diff --exclude CVS -Naurp ecos/ecos/packages/devs/eth/powerpc/mv2p/current/src/opb_ethctrl.h ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/src/opb_ethctrl.h --- ecos/ecos/packages/devs/eth/powerpc/mv2p/current/src/opb_ethctrl.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/eth/powerpc/mv2p/current/src/opb_ethctrl.h 2004-10-14 17:45:03.000000000 +0200 @@ -0,0 +1,150 @@ +//========================================================================== +// +// dev/opb_ethctrl.h +// +// Ethernet device driver for Memec Design OPB-ETHCTRL +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2004-10-14 +// Purpose: +// Description: hardware driver for Memec OPB-ETHCTRL +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +// Ethernet device driver for Memec Design OPB-ETHCTRL + +#ifndef _MV2P_OPB_ETHERNET_H_ +#define _MV2P_OPB_ETHERNET_H_ +// +// Memec Ethernet controller +// + +struct opb_ethctrl { + unsigned long hwaddr[2]; // Hardware (ESA) address + unsigned long address_hash[2]; // Address hash filter + unsigned long max_rx_frame; // Max Rx receive frame + unsigned long rx_cfg; // Rx configuration + unsigned long max_tx_frame; // Max Tx send frame + unsigned long timing_cfg; // Tx timing configuration + unsigned long tx_cfg; // Tx configuration + unsigned long fifo_cfg; // FIFO control + unsigned long fifo_flush; // Forceably flush FIFO + unsigned long control_frame; // Issue a control frame + unsigned long phy_cfg; // PHY configuration + unsigned long phy_control; // PHY access + unsigned long rx_frame_addr; // Rx frame base address + unsigned long rx_stat; // Rx status + unsigned long tx_frame_addr; // Tx frame base address + unsigned long tx_frame_len; // Length of Tx data + unsigned long tx_stat; // Tx status + unsigned long _unused0[1]; + unsigned long int_stat; // Interrupt status + unsigned long int_enable; // Interrupt enable + unsigned long int_cfg; // Interrupt control + unsigned long _unused1[2]; + struct stats { + unsigned long clear; // Reset statistics + unsigned long tx_ok; // Number of frames transmitted + unsigned long s_col; // Number of frames with single collision + unsigned long m_col; // Number of frames with multiple collisions + unsigned long rx_ok; // Number of frames received + unsigned long rx_fcs; // Number of frames with checksum errors (FCS) + unsigned long rx_align; // Number of frames with alignment errors + }; +}; + +// Rx Configuration +#define OPB_ETH_RX_CFG_ENABLE (1<<0) + +// Tx Configuration +#define OPB_ETH_TX_CFG_ENABLE (1<<0) +#define OPB_ETH_TX_CFG_PAD (1<<6) +#define OPB_ETH_TX_CFG_CRC (1<<7) + +// Interrupts +#define OPB_ETH_INT_STAT_RX (1<<0) // Rx frame complete +#define OPB_ETH_INT_STAT_RXBX (1<<1) // Rx data moved from controller/FIFO +#define OPB_ETH_INT_STAT_TX (1<<2) // Tx frame complete +#define OPB_ETH_INT_STAT_TXBX (1<<3) // Tx data moved to controller/FIFO +#define OPB_ETH_INT_STAT_PHY (1<<4) // PHY status change +#define OPB_ETH_INT_STAT_PAUSE (1<<5) +#define OPB_ETH_INT_STAT_WBE (1<<6) // Write bus error +#define OPB_ETH_INT_STAT_RBE (1<<7) // Read bus error +#define OPB_ETH_INT_STAT_RXOE (1<<8) // Rx overflow + +// FIFO Configuration +#define OPB_ETH_FIFO_CFG_RX_LE (1<<16) // Rx FIFO is little endian +#define OPB_ETH_FIFO_CFG_TX_LE (1<<17) // Tx FIFO is little endian +#define OPB_ETH_FIFO_FLUSH_RX (1<<0) // Flush Rx FIFO +#define OPB_ETH_FIFO_FLUSH_TX (1<<1) // Flush Tx FIFO + +// +// Buffer flags/status +// +#define BD_FREE 0x0001 // Buffer is empty +#define BD_DONE 0x0002 // Operation complete +#define BD_BX 0x0004 // Bus (data movement) interrupt + +struct eth_bd { + unsigned char *buf; + int len; + int status; + struct eth_bd *next; +}; + +struct mv2p_eth_info { + volatile struct opb_ethctrl *opb_eth; + volatile struct eth_bd *txbd, *rxbd; // Next Tx,Rx descriptor to use + volatile struct eth_bd *tx_next; // Next buffer for Tx completion + volatile struct eth_bd *tb_next; // Next buffer for Tx bus completion + volatile struct eth_bd *rx_next; // Next buffer for Rx completion + volatile struct eth_bd *rb_next; // Next buffer for Rx bus completion + int txactive; // Count of active Tx buffers + int txbusy; // Tx packet queued to device + unsigned long txkey[CYGNUM_DEVS_ETH_POWERPC_MV2P_TxNUM]; +}; + +#define IEEE_8023_MAX_FRAME 1540 + +#endif // _MV2P_OPB_ETHERNET_H_ diff --exclude CVS -Naurp ecos/ecos/packages/devs/flash/amd/am29xxxxx/current/ChangeLog ecos-mv2p/ecos/packages/devs/flash/amd/am29xxxxx/current/ChangeLog --- ecos/ecos/packages/devs/flash/amd/am29xxxxx/current/ChangeLog 2004-04-23 22:50:32.000000000 +0200 +++ ecos-mv2p/ecos/packages/devs/flash/amd/am29xxxxx/current/ChangeLog 2004-10-14 17:42:50.000000000 +0200 @@ -1,3 +1,9 @@ +2004-10-14 Wouter Cloetens + + * cdl/flash_amd_am29xxxxx.cdl: + * include/flash_am29xxxxx_parts.inl: + Toshiba TH50VSF2581 flash memory support. + 2004-04-21 Sebastien Couret * include/flash_am29xxxxx.inl: Minor changes to silence warnings. diff --exclude CVS -Naurp ecos/ecos/packages/devs/flash/amd/am29xxxxx/current/cdl/flash_amd_am29xxxxx.cdl ecos-mv2p/ecos/packages/devs/flash/amd/am29xxxxx/current/cdl/flash_amd_am29xxxxx.cdl --- ecos/ecos/packages/devs/flash/amd/am29xxxxx/current/cdl/flash_amd_am29xxxxx.cdl 2003-11-24 15:28:14.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/flash/amd/am29xxxxx/current/cdl/flash_amd_am29xxxxx.cdl 2004-09-22 11:21:21.000000000 +0200 @@ -276,4 +276,13 @@ cdl_package CYGPKG_DEVS_FLASH_AMD_AM29XX able to recognize and handle the AMD29LV065D part in the family." } + + cdl_option CYGHWR_DEVS_FLASH_AMD_TH50VSF258 { + display "Toshiba TH50VSF2581 flash memory support" + default_value 0 + implements CYGINT_DEVS_FLASH_AMD_VARIANTS + description " + When this option is enabled, the AMD flash driver will be + able to recognize and handle the Toshiba TH50VSF2581." + } } diff --exclude CVS -Naurp ecos/ecos/packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl ecos-mv2p/ecos/packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl --- ecos/ecos/packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl 2004-04-11 13:47:17.000000000 +0200 +++ ecos-mv2p/ecos/packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl 2004-10-15 11:05:09.000000000 +0200 @@ -1092,6 +1092,29 @@ bufsiz : 1 }, #endif +#ifdef CYGHWR_DEVS_FLASH_AMD_TH50VSF258 + { // Toshiba TH50VSF2581 + device_id : FLASHWORD(0x9C), + block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 64, + device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : true, + bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x000000-0x001FFF + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x002000-0x003FFF + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x004000-0x005FFF + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x006000-0x007FFF + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x008000-0x009FFF + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x00A000-0x00BFFF + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x00C000-0x00DFFF + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // 0x00E000-0x00FFFF + _LAST_BOOTBLOCK + }, + banked : false, + bufsiz : 1 + }, +#endif #endif // 16 bit devices diff --exclude CVS -Naurp ecos/ecos/packages/devs/flash/powerpc/mv2p/current/ChangeLog ecos-mv2p/ecos/packages/devs/flash/powerpc/mv2p/current/ChangeLog --- ecos/ecos/packages/devs/flash/powerpc/mv2p/current/ChangeLog 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/flash/powerpc/mv2p/current/ChangeLog 2004-10-15 11:17:04.000000000 +0200 @@ -0,0 +1,35 @@ +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== diff --exclude CVS -Naurp ecos/ecos/packages/devs/flash/powerpc/mv2p/current/cdl/flash_mv2p.cdl ecos-mv2p/ecos/packages/devs/flash/powerpc/mv2p/current/cdl/flash_mv2p.cdl --- ecos/ecos/packages/devs/flash/powerpc/mv2p/current/cdl/flash_mv2p.cdl 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/flash/powerpc/mv2p/current/cdl/flash_mv2p.cdl 2004-10-15 11:17:51.000000000 +0200 @@ -0,0 +1,72 @@ +# ==================================================================== +# +# flash_mv2p.cdl +# +# FLASH memory - Hardware support on Memec Virtex-II/Pro P160 +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2003, 2004 Mind n.v. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): Gary Thomas +# Contributors: +# Date: 2003-04-11 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_MV2P { + display "Memec Virtex-II/Pro (P-160) board FLASH memory support" + description "FLASH memory device support Memec Virtex-II/Pro P160" + + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + requires CYGPKG_HAL_POWERPC_MV2P + + compile mv2p_flash.c + + # Arguably this should do in the generic package + # but then there is a logic loop so you can never enable it. + cdl_interface CYGINT_DEVS_FLASH_AMD_AM29XXXXX_REQUIRED { + display "Generic AMD AM29LV800B driver required" + } + + implements CYGINT_DEVS_FLASH_AMD_AM29XXXXX_REQUIRED + requires CYGHWR_DEVS_FLASH_AMD_TH50VSF258 +} + +# EOF flash_mv2p.cdl diff --exclude CVS -Naurp ecos/ecos/packages/devs/flash/powerpc/mv2p/current/src/mv2p_flash.c ecos-mv2p/ecos/packages/devs/flash/powerpc/mv2p/current/src/mv2p_flash.c --- ecos/ecos/packages/devs/flash/powerpc/mv2p/current/src/mv2p_flash.c 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/flash/powerpc/mv2p/current/src/mv2p_flash.c 2004-10-15 11:18:17.000000000 +0200 @@ -0,0 +1,65 @@ +//========================================================================== +// +// mv2p_flash.c +// +// Flash programming for Toshiba devices on Memec Virtex-II/Pro P-160 +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Gary Thomas +// Contributors: +// Date: 2003-04-11 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +#define CYGNUM_FLASH_INTERLEAVE (2) +#define CYGNUM_FLASH_SERIES (1) +#define CYGNUM_FLASH_WIDTH (16) +#define CYGNUM_FLASH_BASE (0x82000000u) +#define CYGHWR_FLASH_AM29XXXXX_NO_WRITE_PROTECT + +#include "cyg/io/flash_am29xxxxx.inl" + + +// ------------------------------------------------------------------------ +// EOF mv2p_flash.c diff --exclude CVS -Naurp ecos/ecos/packages/devs/serial/powerpc/mv2p/current/ChangeLog ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/ChangeLog --- ecos/ecos/packages/devs/serial/powerpc/mv2p/current/ChangeLog 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/ChangeLog 2004-10-15 11:19:11.000000000 +0200 @@ -0,0 +1,40 @@ +2004-10-14 Wouter Cloetens + + * Support for the Xilinx UART Lite in the Memec Virtex-II Pro + evaluation kit. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== diff --exclude CVS -Naurp ecos/ecos/packages/devs/serial/powerpc/mv2p/current/cdl/ser_powerpc_mv2p.cdl ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/cdl/ser_powerpc_mv2p.cdl --- ecos/ecos/packages/devs/serial/powerpc/mv2p/current/cdl/ser_powerpc_mv2p.cdl 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/cdl/ser_powerpc_mv2p.cdl 2004-10-15 11:35:59.000000000 +0200 @@ -0,0 +1,168 @@ +# ==================================================================== +# +# ser_powerpc_mv2p.cdl +# +# eCos serial POWERPC/MV2P configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2003, 2004 Mind n.v. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Original data: gthomas +# Contributors: +# Date: 2004-10-14 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + + +cdl_package CYGPKG_IO_SERIAL_POWERPC_MV2P { + display "Memec Virtex-II/Pro serial device drivers" + + parent CYGPKG_IO_SERIAL_DEVICES + active_if CYGPKG_IO_SERIAL + active_if CYGPKG_HAL_POWERPC_MV2P + + requires CYGPKG_ERROR + include_dir cyg/io + include_files ; # none _exported_ whatsoever + description " + This option enables the serial device drivers for the + Memec Virtex-II/Pro." + + compile -library=libextras.a mv2p_serial.c + + define_proc { + puts $::cdl_system_header "/***** serial driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_DEVICE_HEADER " + puts $::cdl_system_header "/***** serial driver proc output end *****/" + } + + cdl_component CYGPKG_IO_SERIAL_POWERPC_MV2P_SERIAL0 { + display "Memec Virtex-II/Pro serial port 0 driver" + flavor bool + default_value 1 + description " + This option includes the serial device driver for the Memec Virtex-II/Pro + port 0." + + cdl_option CYGDAT_IO_SERIAL_POWERPC_MV2P_SERIAL0_NAME { + display "Device name for the Memec Virtex-II/Pro serial port 0 driver" + flavor data + default_value {"\"/dev/ser0\""} + description " + This option sets the name of the serial device for the POWERPC + MV2P-1 port 0." + } + + cdl_option CYGNUM_IO_SERIAL_POWERPC_MV2P_SERIAL0_BAUD { + display "Baud rate for the Memec Virtex-II/Pro serial port 0 driver" + flavor data + legal_values { 115200 } + default_value 115200 + description " + This option specifies the default baud rate (speed) for the + Memec Virtex-II/Pro port 0." + } + + cdl_option CYGNUM_IO_SERIAL_POWERPC_MV2P_SERIAL0_BUFSIZE { + display "Buffer size for the Memec Virtex-II/Pro serial port 0 driver" + flavor data + legal_values 0 to 8192 + default_value 128 + description " + This option specifies the size of the internal buffers used for + the Memec Virtex-II/Pro port 0." + } + } + + cdl_component CYGPKG_IO_SERIAL_POWERPC_MV2P_OPTIONS { + display "Serial device driver build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_IO_SERIAL_POWERPC_MV2P_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building these serial device drivers. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_IO_SERIAL_POWERPC_MV2P_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building these serial device drivers. These flags are removed from + the set of global flags if present." + } + } + + cdl_component CYGPKG_IO_SERIAL_POWERPC_MV2P_TESTING { + display "Testing parameters" + flavor bool + calculated 1 + + implements CYGINT_IO_SERIAL_TEST_SKIP_38400 + implements CYGINT_IO_SERIAL_TEST_SKIP_57600 + implements CYGINT_IO_SERIAL_TEST_SKIP_PARITY_EVEN + + cdl_option CYGPRI_SER_TEST_SER_DEV { + display "Serial device used for testing" + flavor data + default_value { CYGDAT_IO_SERIAL_POWERPC_MV2P_SERIAL0_NAME } + } + + define_proc { + puts $::cdl_header "#define CYGPRI_SER_TEST_CRASH_ID \"powerpcmv2p\"" + puts $::cdl_header "#define CYGPRI_SER_TEST_TTY_DEV \"/dev/tty0\"" + } + } +} + +# EOF ser_powerpc_mv2p.cdl diff --exclude CVS -Naurp ecos/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.c ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.c --- ecos/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.c 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.c 2004-10-15 11:19:32.000000000 +0200 @@ -0,0 +1,309 @@ +//========================================================================== +// +// devs/serial/powerpc/mv2p_serial.c +// +// Memec Virtex-II/Pro Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2004-10-14 +// Purpose: Memec Virtex-II/Pro Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include +#include +#include +#include +#include +#include // IO macros + +#ifdef CYGPKG_IO_SERIAL_POWERPC_MV2P + +//#include "mv2p_serial.h" + +typedef struct mv2p_serial_info { + cyg_uint32 *base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt; + cyg_handle_t serial_interrupt_handle; + cyg_bool xmit_busy; +} mv2p_serial_info; + +static bool mv2p_serial_init(struct cyg_devtab_entry *tab); +static bool mv2p_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo mv2p_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char mv2p_serial_getc(serial_channel *chan); +static Cyg_ErrNo mv2p_serial_set_config(serial_channel *chan, + cyg_uint32 key, + const void *xbuf, cyg_uint32 *len); +static void mv2p_serial_start_xmit(serial_channel *chan); +static void mv2p_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 mv2p_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void mv2p_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(mv2p_serial_funs, + mv2p_serial_putc, + mv2p_serial_getc, + mv2p_serial_set_config, + mv2p_serial_start_xmit, + mv2p_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_POWERPC_MV2P_SERIAL0 +static mv2p_serial_info mv2p_serial_info0 = {_MV2P_UART, + CYGNUM_HAL_INTERRUPT_UART0}; +#if CYGNUM_IO_SERIAL_POWERPC_MV2P_SERIAL0_BUFSIZE > 0 +static unsigned char mv2p_serial_out_buf0[CYGNUM_IO_SERIAL_POWERPC_MV2P_SERIAL0_BUFSIZE]; +static unsigned char mv2p_serial_in_buf0[CYGNUM_IO_SERIAL_POWERPC_MV2P_SERIAL0_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(mv2p_serial_channel0, + mv2p_serial_funs, + mv2p_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_MV2P_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &mv2p_serial_out_buf0[0], sizeof(mv2p_serial_out_buf0), + &mv2p_serial_in_buf0[0], sizeof(mv2p_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(mv2p_serial_channel0, + mv2p_serial_funs, + mv2p_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_MV2P_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(mv2p_serial_io0, + CYGDAT_IO_SERIAL_POWERPC_MV2P_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + mv2p_serial_init, + mv2p_serial_lookup, // Serial driver may need initializing + &mv2p_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_POWERPC_MV2P_SERIAL0 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +mv2p_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + mv2p_serial_info *mv2p_chan = (mv2p_serial_info *)chan->dev_priv; + cyg_uint32 lcr; + + // This port can't really be configured - just fake it + HAL_READ_UINT32(mv2p_chan->base+_MV2P_UART_CONTROL, lcr); + lcr |= _MV2P_UART_CONTROL_EI; + HAL_WRITE_UINT32(mv2p_chan->base+_MV2P_UART_CONTROL, lcr); + mv2p_chan->xmit_busy = false; + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +mv2p_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + mv2p_serial_info *mv2p_chan = (mv2p_serial_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("MV2P SERIAL init - dev: %x.%d\n", mv2p_chan->base, mv2p_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(mv2p_chan->int_num, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + mv2p_serial_ISR, + mv2p_serial_DSR, + &mv2p_chan->serial_interrupt_handle, + &mv2p_chan->serial_interrupt); + cyg_drv_interrupt_attach(mv2p_chan->serial_interrupt_handle); + cyg_drv_interrupt_unmask(mv2p_chan->int_num); + } + mv2p_serial_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +mv2p_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +mv2p_serial_putc(serial_channel *chan, unsigned char c) +{ + mv2p_serial_info *mv2p_chan = (mv2p_serial_info *)chan->dev_priv; + cyg_uint32 lsr; + + HAL_READ_UINT32(mv2p_chan->base+_MV2P_UART_STATUS, lsr); + if ((lsr & _MV2P_UART_STATUS_TxEMPTY) != 0) { + // Transmit buffer is empty + mv2p_chan->xmit_busy = true; + HAL_WRITE_UINT32(mv2p_chan->base+_MV2P_UART_TxFIFO, c); + return true; + } else { + // No space at the moment + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +mv2p_serial_getc(serial_channel *chan) +{ + mv2p_serial_info *mv2p_chan = (mv2p_serial_info *)chan->dev_priv; + cyg_uint32 lsr, ch; + + do { + HAL_READ_UINT32(mv2p_chan->base+_MV2P_UART_STATUS, lsr); + } while ((lsr & _MV2P_UART_STATUS_RxVALID) == 0); + + HAL_READ_UINT32(mv2p_chan->base+_MV2P_UART_RxFIFO, ch); + return ch; +} + +// Set up the device characteristics; baud rate, etc. +static Cyg_ErrNo +mv2p_serial_set_config(serial_channel *chan, cyg_uint32 key, + const void *xbuf, cyg_uint32 *len) +{ + switch (key) { + case CYG_IO_SET_CONFIG_SERIAL_INFO: + { + cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf; + if ( *len < sizeof(cyg_serial_info_t) ) { + return -EINVAL; + } + *len = sizeof(cyg_serial_info_t); + if ( true != mv2p_serial_config_port(chan, config, false) ) + return -EINVAL; + } + break; + default: + return -EINVAL; + } + return ENOERR; +} + +// Enable the transmitter on the device +static void +mv2p_serial_start_xmit(serial_channel *chan) +{ + mv2p_serial_info *mv2p_chan = (mv2p_serial_info *)chan->dev_priv; + cyg_uint32 lsr; + + HAL_READ_UINT32(mv2p_chan->base+_MV2P_UART_STATUS, lsr); + if ((lsr & _MV2P_UART_STATUS_TxEMPTY) != 0) { + // Tell upper layer + (chan->callbacks->xmt_char)(chan); + } +} + +// Disable the transmitter on the device +static void +mv2p_serial_stop_xmit(serial_channel *chan) +{ + // Nothing to be done +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +mv2p_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + mv2p_serial_info *mv2p_chan = (mv2p_serial_info *)chan->dev_priv; + + cyg_drv_interrupt_mask(mv2p_chan->int_num); + cyg_drv_interrupt_acknowledge(mv2p_chan->int_num); + return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR +} + +// Serial I/O - high level interrupt handler (DSR) +static void +mv2p_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + mv2p_serial_info *mv2p_chan = (mv2p_serial_info *)chan->dev_priv; + cyg_uint32 lsr, ch; + + // This device is really dumb - it doesn't tell us why an interrupt happens + HAL_READ_UINT32(mv2p_chan->base+_MV2P_UART_STATUS, lsr); + if ((lsr & _MV2P_UART_STATUS_TxEMPTY) != 0) { + // The device can now send another character + if (mv2p_chan->xmit_busy) { + mv2p_chan->xmit_busy = false; + // Tell upper layer + (chan->callbacks->xmt_char)(chan); + } + } + if ((lsr & _MV2P_UART_STATUS_RxVALID) != 0) { + // A character has arrived + HAL_READ_UINT32(mv2p_chan->base+_MV2P_UART_RxFIFO, ch); + (chan->callbacks->rcv_char)(chan, ch); + } + cyg_drv_interrupt_unmask(mv2p_chan->int_num); +} +#endif diff --exclude CVS -Naurp ecos/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.h ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.h --- ecos/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/serial/powerpc/mv2p/current/src/mv2p_serial.h 2004-10-15 11:19:28.000000000 +0200 @@ -0,0 +1,80 @@ +#ifndef CYGONCE_POWERPC_MV2P_SERIAL_H +#define CYGONCE_POWERPC_MV2P_SERIAL_H + +// ==================================================================== +// +// mv2p_serial.h +// +// Device I/O - Description of Memec Virtex-II/Pro serial hardware +// +// ==================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on Memec Virtex-II/Pro + +//----------------------------------------------------------------------------- +// UART-lite definitions + +#define UART_RxFIFO 0x0 +#define UART_TxFIFO 0x1 +#define UART_STATUS 0x2 +#define UART_CONTROL 0x3 + +#define UART_STATUS_PE (1<<(31-24)) // Parity error +#define UART_STATUS_FE (1<<(31-25)) // Framing error +#define UART_STATUS_OE (1<<(31-26)) // Overrun error +#define UART_STATUS_IE (1<<(31-27)) // Interrupt enabled +#define UART_STATUS_TxFULL (1<<(31-28)) // Tx FIFO full +#define UART_STATUS_TxEMPTY (1<<(31-29)) // Tx FIFO empty +#define UART_STATUS_RxFULL (1<<(31-30)) // Rx FIFO full +#define UART_STATUS_RxVALID (1<<(31-31)) // Rx FIFO not empty + +#define UART_CONTROL_EI (1<<(31-27)) // Enable interrupt +#define UART_CONTROL_RST_Rx (1<<(31-30)) // Clear (reset) Rx FIFO +#define UART_CONTROL_RST_Tx (1<<(31-31)) // Clear (reset) Tx FIFO + +#endif // CYGONCE_POWERPC_MV2P_SERIAL_H diff --exclude CVS -Naurp ecos/ecos/packages/devs/watchdog/powerpc/ppc405/current/ChangeLog ecos-mv2p/ecos/packages/devs/watchdog/powerpc/ppc405/current/ChangeLog --- ecos/ecos/packages/devs/watchdog/powerpc/ppc405/current/ChangeLog 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/watchdog/powerpc/ppc405/current/ChangeLog 2004-10-15 11:36:27.000000000 +0200 @@ -0,0 +1,36 @@ +2004-10-14 Wouter Cloetens + + * PowerPC 405 watchdog support. + +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### diff --exclude CVS -Naurp ecos/ecos/packages/devs/watchdog/powerpc/ppc405/current/cdl/watchdog_ppc405.cdl ecos-mv2p/ecos/packages/devs/watchdog/powerpc/ppc405/current/cdl/watchdog_ppc405.cdl --- ecos/ecos/packages/devs/watchdog/powerpc/ppc405/current/cdl/watchdog_ppc405.cdl 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/watchdog/powerpc/ppc405/current/cdl/watchdog_ppc405.cdl 2004-10-15 11:36:50.000000000 +0200 @@ -0,0 +1,101 @@ +# ==================================================================== +# +# watchdog_ppc405.cdl +# +# eCos watchdog for powerpc/ppc405 driver configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2004 Mind n.v. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): Wouter Cloetens +# Contributors: Wouter Cloetens +# Date: 2004-06-17 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVICES_WATCHDOG_PPC405 { + parent CYGPKG_IO_WATCHDOG + active_if CYGPKG_IO_WATCHDOG + display "ppc405 watchdog driver" + requires CYGPKG_HAL_POWERPC_PPC40x + hardware + compile watchdog_ppc405.cxx + implements CYGINT_WATCHDOG_HW_IMPLEMENTATIONS + implements CYGINT_WATCHDOG_RESETS_ON_TIMEOUT + active_if CYGIMP_WATCHDOG_HARDWARE + + cdl_option CYGIMP_WATCHDOG_HARDWARE { + parent CYGPKG_IO_WATCHDOG_IMPLEMENTATION + display "Hardware watchdog" + default_value 1 + implements CYGINT_WATCHDOG_IMPLEMENTATIONS + } + + cdl_component CYGPKG_DEVICES_WATCHDOG_POWERPC_PPC405_OPTIONS { + display "ppc405 watchdog build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + cdl_option CYGPKG_DEVICES_WATCHDOG_POWERPC_PPC405_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the watchdog device. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_DEVICES_WATCHDOG_POWERPC_PPC405_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the watchdog device. These flags are removed from + the set of global flags if present." + } + + } +} diff --exclude CVS -Naurp ecos/ecos/packages/devs/watchdog/powerpc/ppc405/current/src/watchdog_ppc405.cxx ecos-mv2p/ecos/packages/devs/watchdog/powerpc/ppc405/current/src/watchdog_ppc405.cxx --- ecos/ecos/packages/devs/watchdog/powerpc/ppc405/current/src/watchdog_ppc405.cxx 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/devs/watchdog/powerpc/ppc405/current/src/watchdog_ppc405.cxx 2004-10-14 17:56:16.000000000 +0200 @@ -0,0 +1,128 @@ +//========================================================================== +// +// devs/watchdog/powerpc/ppc405/watchdog_ppc405.cxx +// +// Watchdog implementation for PowerPC 405 +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Wouter Cloetens +// Contributors: Wouter Cloetens +// Date: 2004-06-17 +// Purpose: Watchdog class implementation +// Description: Contains an implementation of the Watchdog class for use +// with the ppc405 watchdog timer. +// +//####DESCRIPTIONEND#### +// +//========================================================================== +#include // system configuration file +#include // configuration for this package + +#include // tracing macros + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include // PowerPC register definitions +#include // PPC40x register definitions +#include // Interrupts + +#include // watchdog API + +// ------------------------------------------------------------------------- +// Constructor + +void +Cyg_Watchdog::init_hw(void) +{ + CYG_REPORT_FUNCTION(); + + // do nothing + + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// Start the watchdog running. +void +Cyg_Watchdog::start(void) +{ + CYG_INTERRUPT_STATE oldints; + cyg_uint32 tcr, tcr_save; + CYG_REPORT_FUNCTION(); + + HAL_DISABLE_INTERRUPTS(oldints); + + // Clear state before enabling. + CYGARC_MTSPR(SPR_TSR, TSR_WIS | TSR_ENW); + + CYGARC_MFSPR(SPR_TCR, tcr); + tcr_save = tcr; + + // Don't enable interrupt. + // Reset entire system on timeout. + tcr |= TCR_WRC_System; + // Timeout after 2^29 clock ticks. + tcr |= TCR_WP_29; + CYGARC_MTSPR(SPR_TCR, tcr); + + HAL_RESTORE_INTERRUPTS(oldints); + +// CYG_ASSERT((tcr_save & TCR_WIE) == 0, "Watchdog interrupt was enabled"); +// CYG_ASSERT((tcr_save & TCR_WRC_System) == 0, "Watchdog already enabled"); + + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// Reset watchdog timer. This needs to be called regularly to prevent +// the watchdog firing. +void +Cyg_Watchdog::reset() +{ + cyg_uint32 tsr; + CYG_REPORT_FUNCTION(); + + // Reset watchdog interrupt status. + tsr = TSR_WIS; + CYGARC_MTSPR(SPR_TSR, tsr); + + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// EOF watchdog_ppc405.cxx diff --exclude CVS -Naurp ecos/ecos/packages/ecos.db ecos-mv2p/ecos/packages/ecos.db --- ecos/ecos/packages/ecos.db 2004-10-05 14:53:40.000000000 +0200 +++ ecos-mv2p/ecos/packages/ecos.db 2004-10-14 18:13:15.000000000 +0200 @@ -1972,6 +1972,16 @@ package CYGPKG_DEVICES_WATCHDOG_MPC5xx { mpc5xx processor family." } +package CYGPKG_DEVICES_WATCHDOG_PPC405 { + alias { "Watchdog driver for PowerPC 405 processor" devices_watchdog_ppc405 device_watchdog_ppc405 } + directory devs/watchdog/powerpc/ppc405 + script watchdog_ppc405.cdl + hardware + description " + This package provides a watchdog driver implementation for the + PowerPC 405 processor family." +} + package CYGPKG_DEVICES_WATCHDOG_SH_SH3 { alias { "Watchdog driver for the Hitachi SH3 chip" devices_watchdog_sh3 device_watchdog_sh3 } directory devs/watchdog/sh/sh3 @@ -5525,6 +5535,59 @@ target rattler { eCos on an Analogue & Micro Rattler (MPC8250) board." } +# -------------------------------------------------------------------------- +package CYGPKG_HAL_POWERPC_MV2P { + alias { "Memec Virtex-II/Pro PowerPC 405 board" hal_powerpc_mv2p } + directory hal/powerpc/mv2p + script hal_powerpc_mv2p.cdl + hardware + description " + The MV2P HAL package provides the support needed to run + eCos on a Memec Virtex-II/Pro PowerPC 405 board." +} + +package CYGPKG_DEVS_FLASH_MV2P { + alias { "Support for flash memory on Memec Virtex-II/Pro P160" flash_mv2p } + directory devs/flash/powerpc/mv2p + script flash_mv2p.cdl + hardware + description " + This package contains hardware support for flash memory + on the Memec Virtex-II/Pro (P160) platform." +} + +package CYGPKG_DEVS_ETH_POWERPC_MV2P { + alias { "Memec Virtex-II/Pro ethernet driver" mv2p_eth_driver } + hardware + directory devs/eth/powerpc/mv2p + script mv2p_eth_drivers.cdl + description "Ethernet driver for Memec Virtex-II/Pro" +} + +package CYGPKG_IO_SERIAL_POWERPC_MV2P { + alias { "Memec Virtex-II/Pro serial device drivers" + devs_serial_powerpc_mv2p mv2p_serial_driver } + hardware + directory devs/serial/powerpc/mv2p + script ser_powerpc_mv2p.cdl + description "Memec Virtex-II/Pro serial device drivers" +} + +target mv2p { + alias { "Memec Virtex-II/Pro PowerPC 405" memec_v2p } + packages { CYGPKG_HAL_POWERPC + CYGPKG_HAL_POWERPC_PPC40x + CYGPKG_HAL_POWERPC_MV2P + CYGPKG_DEVS_FLASH_MV2P + CYGPKG_DEVS_FLASH_AMD_AM29XXXXX + CYGPKG_DEVS_ETH_POWERPC_MV2P + CYGPKG_IO_SERIAL_POWERPC_MV2P + } + description " + The mv2p target provides the packages needed to run + eCos on the Memec Virtex-II/Pro (PowerPC 405) board." +} + ##------------------------------------------------------------------------------------------- ## TAMS MOAB (PowerPC 405GPr) packages ## diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/moab/current/ChangeLog ecos-mv2p/ecos/packages/hal/powerpc/moab/current/ChangeLog --- ecos/ecos/packages/hal/powerpc/moab/current/ChangeLog 2004-09-19 17:05:07.000000000 +0200 +++ ecos-mv2p/ecos/packages/hal/powerpc/moab/current/ChangeLog 2004-10-14 17:36:48.000000000 +0200 @@ -1,3 +1,8 @@ +2004-10-14 Wouter Cloetens + + * src/hal_aux.c: Call hal_if_init() from hal_platform_init() instead + of from ppc40x hal_variant_init(). + 2004-09-19 Gary Thomas * src/hal_aux.c (cyg_plf_redboot_startup): Boot mode implies no diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/moab/current/src/hal_aux.c ecos-mv2p/ecos/packages/hal/powerpc/moab/current/src/hal_aux.c --- ecos/ecos/packages/hal/powerpc/moab/current/src/hal_aux.c 2004-09-19 17:05:07.000000000 +0200 +++ ecos-mv2p/ecos/packages/hal/powerpc/moab/current/src/hal_aux.c 2004-10-14 17:33:53.000000000 +0200 @@ -101,6 +101,9 @@ hal_platform_init(void) cyg_pci_device USB_info; cyg_pci_device_id USB_dev = CYG_PCI_NULL_DEVID; + // Start up system I/O + hal_if_init(); + CYGARC_MFDCR(DCR_CPC0_ECID0, _moab_serial_no[0]); CYGARC_MFDCR(DCR_CPC0_ECID1, _moab_serial_no[1]); // Set default ethernet ESA - using 16 bits of munged serial number diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/ChangeLog ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/ChangeLog --- ecos/ecos/packages/hal/powerpc/mv2p/current/ChangeLog 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/ChangeLog 2004-10-15 11:37:47.000000000 +0200 @@ -0,0 +1,41 @@ +2004-10-14 Wouter Cloetens + + * Add support for the Memec Virtex-II Pro FG456 evalutation kit + with the P160 Communications Module 1 and the Memec Linux reference + design. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/cdl/hal_powerpc_mv2p.cdl ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/cdl/hal_powerpc_mv2p.cdl --- ecos/ecos/packages/hal/powerpc/mv2p/current/cdl/hal_powerpc_mv2p.cdl 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/cdl/hal_powerpc_mv2p.cdl 2004-10-15 11:38:38.000000000 +0200 @@ -0,0 +1,325 @@ +# ==================================================================== +# +# hal_powerpc_mv2p.cdl +# +# PowerPC/MV2P board HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2003 Mind NV +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Original data: hmt +# Contributors: gthomas +# Date: 2004-10-14 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_POWERPC_MV2P { + display "Memec Virtex-II/Pro (PowerPC 405) board" + parent CYGPKG_HAL_POWERPC + requires CYGPKG_HAL_POWERPC_PPC40x + define_header hal_powerpc_mv2p.h + include_dir cyg/hal + description " + The MV2P HAL package provides the support needed to run + eCos on a Memec Virtex-II/Pro PowerPC 405 board." + + compile hal_diag.c hal_aux.c mv2p.S + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT +## Broken TLB implementation (hardware problem) + implements CYGINT_HAL_POWERPC_PPC40X_BROKEN_TLB +## FIXME +## This is a workaround to a problem which is totally unexplainable. +## If ^C support is enabled, eCos applications make a call into RedBoot +## to enable the serial port interrupts. However, the call into RedBoot +## fails with an illegal instruction exception every time. There is no +## understandable reason for this, but at the moment the only safe thing +## is to not support this feature. + requires { (CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT == 0) } +## FIXME + + requires { CYGHWR_HAL_POWERPC_PPC4XX == "405" } + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H " + puts $::cdl_system_header "#define CYGBLD_HAL_PLF_IO_H " + + puts $::cdl_header "#define HAL_PLATFORM_CPU \"PowerPC 405\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Memec Virtex-II/Pro (MV2P)\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"RAM" "ROM" "ROMRAM"} + default_value {"RAM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + This option is used to control where the application program will + run, either from RAM or ROM (flash) memory. ROM based applications + must be self contained, while RAM applications will typically assume + the existence of a debug environment, such as GDB stubs." + } + + cdl_option CYGHWR_HAL_POWERPC_CPU_SPEED { + display "Development board clock speed (MHz)" + flavor data + legal_values { 100 300 } + default_value 100 + description " + MV2P Development Boards have various system clock speeds + depending on the processor fitted. Select the clock speed + appropriate for your board so that the system can set the serial + baud rate correctly, amongst other things." + } + + cdl_option CYGHWR_HAL_POWERPC_MEM_SPEED { + display "Development board memory bus speed (MHz)" + flavor data + legal_values 100 + default_value 100 + description " + MV2P Development Boards have various system clock speeds + depending on the processor fitted. Select the clock speed + appropriate for your board so that the system can set the serial + baud rate correctly, amongst other things." + } + + cdl_option CYGNUM_HAL_PLF_VIRTUAL_VECTOR_COMM_CHANNELS { + flavor data + default_value 1 + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + parent CYGPKG_NONE + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "powerpc-eabi" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-msoft-float -mcpu=405 -Wa,-m405 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-msoft-float -mcpu=405 -g -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires { CYG_HAL_STARTUP == "ROM" } + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the platform CDL takes care of creating + an S-Record data file suitable for programming using + the board's EPPC-Bug firmware monitor." + + make -priority 320 { + /bin/gdb_module.bin : /bin/gdb_module.img + $(OBJCOPY) -O srec --change-address=0x02000000 $< $(@:.bin=.srec) + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGPKG_HAL_POWERPC_MV2P_OPTIONS { + display "MV2P build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_HAL_POWERPC_MV2P_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the MV2P HAL. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_HAL_POWERPC_MV2P_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the MV2P HAL. These flags are removed from + the set of global flags if present." + } + + cdl_option CYGPKG_HAL_POWERPC_MV2P_TESTS { + display "MV2P tests" + flavor data + no_define + calculated { "tests/mv2ptime" } + description " + This option specifies the set of tests for the MV2P HAL." + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_mv2p_ram" : \ + CYG_HAL_STARTUP == "ROMRAM" ? "powerpc_mv2p_romram" : \ + "powerpc_mv2p_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + CYG_HAL_STARTUP == "ROMRAM" ? "" : \ + "" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + CYG_HAL_STARTUP == "ROMRAM" ? "" : \ + "" } + } + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "ROMRAM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_option CYGSEM_REDBOOT_PLF_LINUX_BOOT { + active_if CYGBLD_BUILD_REDBOOT_WITH_EXEC + display "Support booting Linux via RedBoot" + flavor bool + default_value 1 + description " + This option enables RedBoot to support booting of a Linux kernel." + + compile plf_redboot_linux_exec.c + } + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + default_value 1 + no_define + description "This option enables the conversion of the Redboot ELF + image to a binary image suitable for ROM programming." + + make -priority 325 { + /bin/redboot.bin : /bin/redboot.elf + $(OBJCOPY) --strip-debug $< $(@:.bin=.img) + $(OBJCOPY) -O srec $< $(@:.bin=.srec) + $(OBJCOPY) -O binary $< $@ + } + } + } +} diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/hal_diag.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/hal_diag.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/hal_diag.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/hal_diag.h 2004-02-24 15:28:47.000000000 +0100 @@ -0,0 +1,78 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +//============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003 Mind NV +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors:nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include + +#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG) + +#include + +#define HAL_DIAG_INIT() hal_if_diag_init() +#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) +#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) + +#else // everything by steam + +#error "Virtual vectors required!" + +#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG + +//----------------------------------------------------------------------------- +// end of hal_diag.h +#endif // CYGONCE_HAL_HAL_DIAG_H diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.h 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,37 @@ +// eCos memory layout - Thu May 30 10:27:39 2002 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x02000000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_for_rom) []; +#endif +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x7cd00) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x02000000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.ldi ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.ldi --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.ldi 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.ldi 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,31 @@ +// eCos memory layout - Thu May 30 10:27:39 2002 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x02000000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_vectors) = 0; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x7cd00; + SECTION_vectors (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.mlt ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.mlt --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.mlt 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_ram.mlt 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,17 @@ +version 0 +region ram 0 02000000 0 ! +section reserved_vectors 3000 1 0 0 1 1 1 1 0 0 reserved_vsr_table reserved_vsr_table ! +section reserved_vsr_table 200 10 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! +section reserved_virtual_table 100 10 0 0 0 1 0 1 reserved_for_rom reserved_for_rom ! +section reserved_for_rom 3cd00 10 0 0 0 1 0 1 vectors vectors ! +section vectors 0 10 0 1 0 1 0 1 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.h 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,35 @@ +// eCos memory layout - Thu May 30 10:21:41 2002 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x02000000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x82000000) +#define CYGMEM_REGION_rom_SIZE (0x00800000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x02000000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.ldi ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.ldi --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.ldi 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.ldi 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,31 @@ +// eCos memory layout - Thu May 30 10:21:41 2002 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x02000000 + rom : ORIGIN = 0x82000000, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (rom, 0x82000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + CYG_LABEL_DEFN(__reserved_vectors) = 0; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + SECTION_data (ram, ALIGN (0x10), FOLLOWING (.gcc_except_table)) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.mlt ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.mlt --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.mlt 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_rom.mlt 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,17 @@ +version 0 +region ram 0 2000000 0 ! +region rom 82000000 800000 1 ! +section reserved_vectors 3000 1 0 0 1 1 1 1 0 0 reserved_vsr_table reserved_vsr_table ! +section reserved_vsr_table 200 1 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! +section reserved_virtual_table 100 1 0 0 0 1 0 0 data ! +section data 0 10 1 1 0 1 0 0 sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! +section vectors 0 1 0 1 1 1 1 1 82000000 82000000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data ! diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.h 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,17 @@ +// eCos memory layout - Thu May 30 10:05:45 2002 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x02000000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x02000000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.ldi ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.ldi --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.ldi 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.ldi 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,27 @@ +// eCos memory layout - Thu May 30 10:05:45 2002 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x02000000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (ram, 0, LMA_EQ_VMA) + SECTION_text (ram, 0x3400, LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.mlt ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.mlt --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.mlt 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/pkgconf/mlt_powerpc_mv2p_romram.mlt 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,13 @@ +version 0 +region ram 0 02000000 0 ! +section vectors 0 1 0 1 1 0 1 0 0 0 ! +section text 0 1 0 1 1 1 1 1 3400 3400 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf.inc ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf.inc --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf.inc 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf.inc 2004-02-24 10:37:44.000000000 +0100 @@ -0,0 +1,120 @@ +#ifndef CYGONCE_HAL_PLF_INC +#define CYGONCE_HAL_PLF_INC +##============================================================================= +## +## plf.inc +## +## PPC40x family assembler header file +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2002, 2003 Gary Thomas +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov, gthomas +## Date: 2000-08-27 +## Purpose: MPCxxx family definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the PPC40x CPU family. +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include // Pointer to interrupt controller + +#ifdef CYG_HAL_STARTUP_ROM +// Special vector alignment required for pseudo-ROM applications +#define CYG_HAL_FUDGE_VECTOR_ALIGNMENT + .macro hal_fudge_vector_alignment + .rept 0x3000/4 + .long 0x55555555 + .endr + .endm + +#define CYG_HAL_RESERVED_VECTOR_00000 + .macro hal_reserved_vector_00000 + // FIXME - If this is code for GDB startup, relocate it + hal_cpu_init + bl 10f +10: mflr r1 // absolute address currently running at + lwi r2,10b // absolute address we need to be at + cmplw r1,r2 + beq 30f // no relocation/copying required + lwi r3,__ram_data_end + lwi r4,__ram_data_start + sub r3,r3,r4 + lwi r4,__rom_data_start + add r3,r3,r4 +20: lwz r4,0(r1) + stw r4,0(r2) + addi r1,r1,4 + addi r2,r2,4 + cmplw r2,r3 + bne 20b +30: lwi r1,_start + mtlr r1 + blr + .endm + +#endif + +#define CYGPKG_HAL_POWERPC_INTC_DEFINED + # decode the interrupt + # the interrupt vector will be 0x500 or 0x10x0 + # 0x0500 = external, must be decoded via EXISR + # 0x10X0 = timer, X is the timer type + # r3 used as scratch + .macro hal_intc_decode dreg,state + lwz \dreg,CYGARC_PPCREG_VECTOR(\state) # retrieve vector number, + extrwi. \dreg,\dreg,1,19 # isolate bit 19 + beq 0f # timer interrupt = 1 + lwz \dreg,CYGARC_PPCREG_VECTOR(\state) # retrieve vector number, + extrwi \dreg,\dreg,2,26 # isolate bits 26-27 + addi \dreg,\dreg,CYGNUM_HAL_INTERRUPT_VAR_TIMER # FIXME + b 1f +0: lwi \dreg,_MV2P_INTC_IVR + lwz \dreg,0(\dreg) + addi \dreg,\dreg,CYGNUM_HAL_INTERRUPT_first +1: stw \dreg,CYGARC_PPCREG_VECTOR(\state) # update vector in state frame. + slwi \dreg,\dreg,2 # convert to byte offset. + .endm + +#endif // CYGONCE_HAL_PLF_INC diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_cache.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_cache.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_cache.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_cache.h 2004-02-24 15:29:34.000000000 +0100 @@ -0,0 +1,78 @@ +#ifndef CYGONCE_PLF_CACHE_H +#define CYGONCE_PLF_CACHE_H + +//============================================================================= +// +// plf_cache.h +// +// Platform HAL cache details +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003 Mind NV +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2000-01-26 +// Purpose: Platform cache control API +// Description: The macros defined here provide the platform specific +// cache control operations / behavior. +// Usage: Is included via the architecture cache header: +// #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +//--------------------------------------------------------------------------- +// Initial cache enabling - controlled by common CDL + +//----------------------------------------------------------------------------- +// FIXME: This definition forces the IO flash driver to use a +// known-good procedure for fiddling flash before calling flash device +// driver functions. The procedure breaks on other platform/driver +// combinations though so is depricated. Hence this definition. +// +// If you work on this target, please try to remove this definition +// and verify that the flash driver still works (both from RAM and +// flash). If it does, remove the definition and this comment for good +// [and the old macro definition if this happens to be the last client +// of that code]. +#define HAL_FLASH_CACHES_OLD_MACROS + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_CACHE_H +// End of plf_cache.h diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_intr.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_intr.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_intr.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_intr.h 2004-10-14 17:02:11.000000000 +0200 @@ -0,0 +1,112 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// Insight/Memec Virtex-II/Pro platform specific interrupt definitions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov, gthomas +// Date: 2004-10-14 +// Purpose: Define platform specific interrupt support +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include + +// Platform defines interrupt layout +#define CYGHWR_HAL_INTERRUPT_LAYOUT_DEFINED +// Additional interrupt sources which are supported by the Virtex-II/Pro +#define CYGNUM_HAL_INTERRUPT_405_BASE 2 +#define CYGNUM_HAL_INTERRUPT_first CYGNUM_HAL_INTERRUPT_405_BASE +#define CYGNUM_HAL_INTERRUPT_EMAC_RX (CYGNUM_HAL_INTERRUPT_405_BASE+0) +#define CYGNUM_HAL_INTERRUPT_EMAC_TX (CYGNUM_HAL_INTERRUPT_405_BASE+1) +#define CYGNUM_HAL_INTERRUPT_UART0 (CYGNUM_HAL_INTERRUPT_405_BASE+5) +#define CYGNUM_HAL_INTERRUPT_last CYGNUM_HAL_INTERRUPT_UART0 + +// Platform defines interrupt controller access +#define CYGHWR_HAL_INTERRUPT_CONTROLLER_DEFINED +externC void hal_mv2p_interrupt_init(void); +externC void hal_mv2p_interrupt_mask(int); +externC void hal_mv2p_interrupt_unmask(int); +externC void hal_mv2p_interrupt_acknowledge(int); +externC void hal_mv2p_interrupt_configure(int, int, int); +externC void hal_mv2p_interrupt_set_level(int, int); + +#define HAL_PLF_INTERRUPT_INIT() \ + hal_mv2p_interrupt_init() +#define HAL_PLF_INTERRUPT_MASK( _vector_ ) \ + hal_mv2p_interrupt_mask( _vector_ ) +#define HAL_PLF_INTERRUPT_UNMASK( _vector_ ) \ + hal_mv2p_interrupt_unmask( _vector_ ) +#define HAL_PLF_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ + hal_mv2p_interrupt_acknowledge( _vector_ ) +#define HAL_PLF_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ + hal_mv2p_interrupt_configure( _vector_, _level_, _up_ ) +#define HAL_PLF_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \ + hal_mv2p_interrupt_set_level( _vector_, _level_ ) + +//----------------------------------------------------------------------------- +// Symbols used by assembly code +#define CYGARC_PLATFORM_DEFS \ + DEFINE(CYGNUM_HAL_INTERRUPT_first, CYGNUM_HAL_INTERRUPT_first); + +//-------------------------------------------------------------------------- +// Control-C support. + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT +#define HAL_PLATFORM_RESET_ENTRY 0xFFFFFFFC + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_io.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_io.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_io.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_io.h 2004-02-24 15:30:23.000000000 +0100 @@ -0,0 +1,69 @@ +#ifndef CYGONCE_PLF_IO_H +#define CYGONCE_PLF_IO_H + +//============================================================================= +// +// plf_io.h +// +// Platform specific IO support +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003 Mind NV +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt, jskov +// Contributors: hmt, jskov, gthomas +// Date: 2002-07-23 +// Purpose: Memec Virtex-II/Pro (PowerPC 405) IO support macros +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include CYGBLD_HAL_PLATFORM_H + +#include // IO macros +#include // Interrupt vectors + +//----------------------------------------------------------------------------- +// PCI support +// ... none + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_PLF_IO_H diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_regs.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_regs.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_regs.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_regs.h 2004-10-14 17:02:58.000000000 +0200 @@ -0,0 +1,102 @@ +#ifndef CYGONCE_HAL_PLF_REGS_H +#define CYGONCE_HAL_PLF_REGS_H + +//========================================================================== +// +// plf_regs.h +// +// Memec Virtex-II/Pro (PowerPC 405) platform CPU definitions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2004-10-14 +// Purpose: +// Description: Possibly override any platform assumptions +// +// Usage: Included via the variant+architecture register headers: +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +// Ethernet controller +#define _MV2P_ETH 0x80000000 +// BRAM +#define _MV2P_BRAM 0x80100000 +// GPIO +#define _MV2P_GPIO 0x808F0100 +// UART (lite) +#define _MV2P_UART 0x808F0200 +// Interrupt controller +#define _MV2P_INTC 0x808F0300 + +//----------------------------------------------------------------------------- +// Interrupt controller layout +#define _MV2P_INTC_ISR (_MV2P_INTC+0x00) +#define _MV2P_INTC_IPR (_MV2P_INTC+0x04) +#define _MV2P_INTC_IER (_MV2P_INTC+0x08) +#define _MV2P_INTC_IAR (_MV2P_INTC+0x0C) +#define _MV2P_INTC_SIE (_MV2P_INTC+0x10) +#define _MV2P_INTC_CIE (_MV2P_INTC+0x14) +#define _MV2P_INTC_IVR (_MV2P_INTC+0x18) +#define _MV2P_INTC_MER (_MV2P_INTC+0x1C) + + +//----------------------------------------------------------------------------- +// UART-lite definitions + +#define _MV2P_UART_RxFIFO 0x0 +#define _MV2P_UART_TxFIFO 0x1 +#define _MV2P_UART_STATUS 0x2 +#define _MV2P_UART_CONTROL 0x3 + +// Note: these bits are numbered funny to match the documentation +#define _MV2P_UART_STATUS_PE (1<<(31-24)) // Parity error +#define _MV2P_UART_STATUS_FE (1<<(31-25)) // Framing error +#define _MV2P_UART_STATUS_OE (1<<(31-26)) // Overrun error +#define _MV2P_UART_STATUS_IE (1<<(31-27)) // Interrupt enabled +#define _MV2P_UART_STATUS_TxFULL (1<<(31-28)) // Tx FIFO full +#define _MV2P_UART_STATUS_TxEMPTY (1<<(31-29)) // Tx FIFO empty +#define _MV2P_UART_STATUS_RxFULL (1<<(31-30)) // Rx FIFO full +#define _MV2P_UART_STATUS_RxVALID (1<<(31-31)) // Rx FIFO not empty + +#define _MV2P_UART_CONTROL_EI (1<<(31-27)) // Enable interrupt +#define _MV2P_UART_CONTROL_RST_Rx (1<<(31-30)) // Clear (reset) Rx FIFO +#define _MV2P_UART_CONTROL_RST_Tx (1<<(31-31)) // Clear (reset) Tx FIFO + +#endif // CYGONCE_HAL_PLF_REGS_H diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_stub.h ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_stub.h --- ecos/ecos/packages/hal/powerpc/mv2p/current/include/plf_stub.h 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/include/plf_stub.h 2004-10-14 17:03:37.000000000 +0200 @@ -0,0 +1,87 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 2004-10-14 +// Purpose: Platform HAL stub support for MV2P PowerPC/405 board. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 + +//---------------------------------------------------------------------------- +// Stub initializer. +#ifdef CYG_HAL_STARTUP_ROM +# define HAL_STUB_PLATFORM_INIT() +// to distinguish eCos stub ROM ready state from either RedBoot or app. +#endif + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_RAM.ecm ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_RAM.ecm --- ecos/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_RAM.ecm 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_RAM.ecm 2004-06-10 18:02:53.000000000 +0200 @@ -0,0 +1,110 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware mv2p ; + template redboot ; + package -hardware CYGPKG_HAL_POWERPC current ; + package -hardware CYGPKG_HAL_POWERPC_PPC40x current ; + package -hardware CYGPKG_HAL_POWERPC_MV2P current ; + package -hardware CYGPKG_DEVS_FLASH_MV2P current ; + package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX current ; + package -hardware CYGPKG_DEVS_ETH_POWERPC_MV2P current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -template CYGPKG_ISOINFRA current ; + package -template CYGPKG_LIBC_STRING current ; + package -template CYGPKG_NS_DNS current ; + package -template CYGPKG_CRC current ; + package CYGPKG_IO_FLASH current ; + package CYGPKG_IO_ETH_DRIVERS current ; +}; + +cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { + inferred_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 0 +}; + +cdl_option CYGSEM_HAL_POWERPC_RESET_USES_JUMP { + user_value 1 +}; + +cdl_component CYG_HAL_STARTUP { + user_value RAM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE { + user_value 0x00040000 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG { + user_value 1 +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_DNS_HEADER { + inferred_value 1 +}; + +cdl_option CYGPKG_NS_DNS_BUILD { + inferred_value 0 +}; + +cdl_option CYGHWR_DEVS_FLASH_AMD_TH50VSF258 { + inferred_value 1 +}; + +cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + user_value 115200 +}; + diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROM.ecm ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROM.ecm --- ecos/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROM.ecm 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROM.ecm 2004-06-10 18:02:47.000000000 +0200 @@ -0,0 +1,95 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware mv2p ; + template redboot ; + package -hardware CYGPKG_HAL_POWERPC current ; + package -hardware CYGPKG_HAL_POWERPC_PPC40x current ; + package -hardware CYGPKG_HAL_POWERPC_MV2P current ; + package -hardware CYGPKG_DEVS_FLASH_MV2P current ; + package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -template CYGPKG_ISOINFRA current ; + package -template CYGPKG_LIBC_STRING current ; + package -template CYGPKG_NS_DNS current ; + package -template CYGPKG_CRC current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { + inferred_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE { + user_value 0x00040000 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG { + user_value 1 +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_DNS_HEADER { + inferred_value 1 +}; + +cdl_option CYGPKG_NS_DNS_BUILD { + inferred_value 0 +}; + +cdl_option CYGHWR_DEVS_FLASH_AMD_TH50VSF258 { + inferred_value 1 +}; + +cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + user_value 115200 +}; diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROMRAM.ecm ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROMRAM.ecm --- ecos/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROMRAM.ecm 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/misc/redboot_ROMRAM.ecm 2004-06-10 18:02:40.000000000 +0200 @@ -0,0 +1,108 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware mv2p ; + template redboot ; + package -hardware CYGPKG_HAL_POWERPC current ; + package -hardware CYGPKG_HAL_POWERPC_PPC40x current ; + package -hardware CYGPKG_HAL_POWERPC_MV2P current ; + package -hardware CYGPKG_DEVS_FLASH_MV2P current ; + package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX current ; + package -hardware CYGPKG_DEVS_ETH_POWERPC_MV2P current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -template CYGPKG_ISOINFRA current ; + package -template CYGPKG_LIBC_STRING current ; + package -template CYGPKG_NS_DNS current ; + package -template CYGPKG_CRC current ; + package CYGPKG_IO_FLASH current ; + package CYGPKG_IO_ETH_DRIVERS current ; +}; + +cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { + inferred_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_POWERPC_RESET_USES_JUMP { + user_value 1 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROMRAM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE { + user_value 0x00040000 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG { + user_value 1 +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 +}; + +cdl_option CYGBLD_ISO_DNS_HEADER { + inferred_value 1 +}; + +cdl_option CYGPKG_NS_DNS_BUILD { + inferred_value 0 +}; + +cdl_option CYGHWR_DEVS_FLASH_AMD_TH50VSF258 { + inferred_value 1 +}; +cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + user_value 115200 +}; diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/src/hal_aux.c ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/hal_aux.c --- ecos/ecos/packages/hal/powerpc/mv2p/current/src/hal_aux.c 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/hal_aux.c 2004-10-14 17:33:46.000000000 +0200 @@ -0,0 +1,156 @@ +//============================================================================= +// +// hal_aux.c +// +// HAL auxiliary objects and code; per platform +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt, gthomas +// Date: 2004-10-14 +// Purpose: HAL aux objects: startup tables. +// Description: Tables for per-platform initialization +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include +#include // HAL memory definitions +#include // Platform registers +#include // hal_if_init +#include // interrupt definitions +#include // assertion macros +#include // I/O macros +#include CYGHWR_MEMORY_LAYOUT_H + +// The memory map is weakly defined, allowing the application to redefine +// it if necessary. The regions defined below are the minimum requirements. +CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = { + // Mapping for the Memec Virtex-II/Pro development boards + CYGARC_MEMDESC_NOCACHE(0x80000000, 0x01000000 ), // I/O + CYGARC_MEMDESC_NOCACHE(0x81000000, 0x01000000 ), // SRAM on P-160 + CYGARC_MEMDESC_NOCACHE(0x82000000, 0x01000000 ), // FLASH on P-160 + CYGARC_MEMDESC_CACHE(CYGMEM_REGION_ram, CYGMEM_REGION_ram_SIZE ), // Main memory + + CYGARC_MEMDESC_TABLE_END +}; + +//-------------------------------------------------------------------------- +// Platform init code. +void +hal_platform_init(void) +{ + volatile unsigned long *gpio = (volatile unsigned long *)_MV2P_GPIO; + + // Initialize I/O interfaces + hal_if_init(); + + // Turn off all LEDs + *gpio |= 0x0F000000; +} + +// +// LED access +// +void +_mv2p_set_leds(int val) +{ + volatile unsigned long *gpio = (volatile unsigned long *)_MV2P_GPIO; + *gpio = (*gpio & 0x00FFFFFF) | ((~val & 0x0F) << 24); +} + +int +_mv2p_get_leds(void) +{ + volatile unsigned long *gpio = (volatile unsigned long *)_MV2P_GPIO; + return (~(*gpio & 0x0F000000)) >> 24; +} + +// Interrupt support + +void +hal_platform_IRQ_init(void) +{ +} + +void +hal_mv2p_interrupt_init(void) +{ + // Clear and acknowledge all interrupts + *(unsigned long *)_MV2P_INTC_CIE = 0xFFFFFFFF; + *(unsigned long *)_MV2P_INTC_IAR = 0xFFFFFFFF; + *(unsigned long *)_MV2P_INTC_IER = 0x00000000; + *(unsigned long *)_MV2P_INTC_MER = 0x00000003; +} + +void +hal_mv2p_interrupt_mask(int vector) +{ + // Mask interrupt + *(unsigned long *)_MV2P_INTC_CIE = 1 << (vector - CYGNUM_HAL_INTERRUPT_first); +} + +void +hal_mv2p_interrupt_unmask(int vector) +{ + // Unmask interrupt + *(unsigned long *)_MV2P_INTC_SIE = 1 << (vector - CYGNUM_HAL_INTERRUPT_first); +} + +void +hal_mv2p_interrupt_acknowledge(int vector) +{ + // Acknowledge interrupt + *(unsigned long *)_MV2P_INTC_IAR = 1 << (vector - CYGNUM_HAL_INTERRUPT_first); +} + +void +hal_mv2p_interrupt_configure(int vector, int level, int dir) +{ +} + +void +hal_mv2p_interrupt_set_level(int vector, int level) +{ +} + +// EOF hal_aux.c diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/src/hal_diag.c ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/hal_diag.c --- ecos/ecos/packages/hal/powerpc/mv2p/current/src/hal_diag.c 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/hal_diag.c 2004-09-23 14:56:04.000000000 +0200 @@ -0,0 +1,289 @@ +//============================================================================= +// +// hal_diag.c +// +// HAL diagnostic I/O code +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt, gthomas +// Date: 2003-08-01 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic I/O support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // IO macros +#include +#include // Interrupt macros +#include + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#include // hal_output_gdb_string +#endif + +#include + +//============================================================================= +// Serial driver +//============================================================================= + +//----------------------------------------------------------------------------- +// There is one serial port +#define CYG_DEV_SERIAL_BASE_A _MV2P_UART + +//----------------------------------------------------------------------------- + +//----------------------------------------------------------------------------- +typedef struct { + cyg_uint8* base; + cyg_int32 msec_timeout; + int isr_vector, irq_state; +} channel_data_t; + +//----------------------------------------------------------------------------- +static void +init_serial_channel(const channel_data_t* __ch_data) +{ + cyg_uint32 *base = __ch_data->base; + cyg_uint32 lcr; + + // Clear FIFOs, disable interrupts + lcr = _MV2P_UART_CONTROL_RST_Rx | _MV2P_UART_CONTROL_RST_Tx; + HAL_WRITE_UINT32(base+_MV2P_UART_CONTROL, lcr); + __ch_data->irq_state = 0; +} + +static cyg_bool +cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + cyg_uint32 *base = ((channel_data_t*)__ch_data)->base; + cyg_uint32 lsr, _ch; + + HAL_READ_UINT32(base+_MV2P_UART_STATUS, lsr); + if ((lsr & _MV2P_UART_STATUS_RxVALID) == 0) + return false; + + HAL_READ_UINT32(base+_MV2P_UART_RxFIFO, _ch); + *ch = _ch; + + return true; +} + + +cyg_uint8 +cyg_hal_plf_serial_getc(void* __ch_data) +{ + cyg_uint8 ch; + + while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); + return ch; +} + +void +cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 c) +{ + cyg_uint32 *base = ((channel_data_t*)__ch_data)->base; + cyg_uint32 lsr; + + do { + HAL_READ_UINT32(base+_MV2P_UART_STATUS, lsr); + } while ((lsr & _MV2P_UART_STATUS_TxEMPTY) == 0); + + HAL_WRITE_UINT32(base+_MV2P_UART_TxFIFO, c); + + // Hang around until the character has been safely sent. + do { + HAL_READ_UINT32(base+_MV2P_UART_STATUS, lsr); + } while ((lsr & _MV2P_UART_STATUS_TxEMPTY) == 0); +} + +static const channel_data_t channels[] = { + { (cyg_uint8*)CYG_DEV_SERIAL_BASE_A, 1000, CYGNUM_HAL_INTERRUPT_UART0}, +}; + +static void +cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, + cyg_uint32 __len) +{ + while(__len-- > 0) + cyg_hal_plf_serial_putc(__ch_data, *__buf++); +} + +static void +cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ + while(__len-- > 0) + *__buf++ = cyg_hal_plf_serial_getc(__ch_data); +} + +cyg_bool +cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + int delay_count; + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_bool res; + + delay_count = chan->msec_timeout * 10; // delay in .1 ms steps + for(;;) { + res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + + CYGACC_CALL_IF_DELAY_US(100); + } + return res; +} + +static int +cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_uint8 ier; + int ret = 0; + + switch (__func) { + case __COMMCTL_IRQ_ENABLE: + HAL_INTERRUPT_UNMASK(chan->isr_vector); + HAL_READ_UINT32(chan->base+_MV2P_UART_CONTROL, ier); + ier |= _MV2P_UART_CONTROL_EI; + HAL_WRITE_UINT32(chan->base+_MV2P_UART_CONTROL, ier); + chan->irq_state = 1; + break; + case __COMMCTL_IRQ_DISABLE: + ret = chan->irq_state; + chan->irq_state = 0; + HAL_INTERRUPT_MASK(chan->isr_vector); + HAL_READ_UINT32(chan->base+_MV2P_UART_CONTROL, ier); + ier &= ~_MV2P_UART_CONTROL_EI; + HAL_WRITE_UINT32(chan->base+_MV2P_UART_CONTROL, ier); + break; + case __COMMCTL_DBG_ISR_VECTOR: + ret = chan->isr_vector; + break; + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + + va_start(ap, __func); + + ret = chan->msec_timeout; + chan->msec_timeout = va_arg(ap, cyg_uint32); + + va_end(ap); + } + default: + break; + } + return ret; +} + +static int +cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_uint8 isr, c; + int res = 0; + + HAL_READ_UINT32(chan->base+_MV2P_UART_STATUS, isr); + // Ignore everything but Rx interrupts + if ((isr & _MV2P_UART_STATUS_RxVALID) != 0) { + // A character has arrived + HAL_READ_UINT32(chan->base+_MV2P_UART_RxFIFO, c); + if( cyg_hal_is_break( &c , 1 ) ) + *__ctrlc = 1; + } + // Acknowledge the interrupt + HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); + res = CYG_ISR_HANDLED; + return res; +} + +static void +cyg_hal_plf_serial_init(void) +{ + hal_virtual_comm_table_t* comm; + int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Disable interrupts. + HAL_INTERRUPT_MASK(channels[0].isr_vector); + + // Init channels + init_serial_channel(&channels[0]); + + // Setup procs in the vector table + + // Set channel 0 + CYGACC_CALL_IF_SET_CONSOLE_COMM(0); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[0]); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); +} + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + initialized = 1; + + cyg_hal_plf_serial_init(); +} + +// EOF hal_diag.c diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/src/mv2p.S ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/mv2p.S --- ecos/ecos/packages/hal/powerpc/mv2p/current/src/mv2p.S 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/mv2p.S 2004-10-14 17:05:22.000000000 +0200 @@ -0,0 +1,122 @@ +##============================================================================= +## +## mv2p.S +## +## MV2P board hardware setup +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2003, 2004 Mind n.v. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): gthomas +## Contributors: +## Date: 2004-10-14 +## Purpose: MV2P board hardware setup +## Description: This file contains any code needed to initialize the +## hardware on a Memec Virtex-II/Pro (PowerPC 405) board. +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include +#include +#include +#include + +#include /* register symbols et al */ +#include /* on-chip resource layout, special */ + +#------------------------------------------------------------------------------ + +// LED macro uses r23, r25: r4 left alone +#define LED(x) + +FUNC_START(_led) +FUNC_END(_led) + +#------------------------------------------------------------------------------ + +FUNC_START( hal_hardware_init ) + +#ifdef CYG_HAL_STARTUP_ROMRAM +// Need to set the PC into the FLASH (ROM) before the address map changes + lwi r3,10f + lwi r5,0x82000000 + or r3,r3,r5 + mtctr r3 + bctr +10: +#endif + + # set the decrementer to maxint + lwi r2,0 + not r2,r2 + mtdec r2 + +#ifdef CYG_HAL_STARTUP_ROM + # move return address to where the ROM is + mflr r3 + lwi r4,0x00FFFFFF // CAUTION!! Assumes only low 16M for ROM + and r3,r3,r4 + oris r3,r3,CYGMEM_REGION_rom>>16 + mtlr r3 +#endif + +#ifdef CYG_HAL_STARTUP_ROMRAM + // Copy image from ROM to RAM + mflr r3 + lwi r4,0x82000000 + lwi r5,0x01FFFFFF // ROM/FLASH base + and r3,r3,r5 // segment relative + lwi r6,_hal_hardware_init_done + mtlr r6 + sub r6,r3,r6 // Absolute address + add r6,r6,r4 // FLASH address + lwi r7,0 // where to copy to + lwi r8,__ram_data_end +10: lwz r5,0(r6) + stw r5,0(r7) + addi r6,r6,4 + addi r7,r7,4 + cmplw r7,r8 + bne 10b +#endif + blr +FUNC_END( hal_hardware_init ) + +#------------------------------------------------------------------------------ +# end of mv2p.S diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/mv2p/current/src/plf_redboot_linux_exec.c ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/plf_redboot_linux_exec.c --- ecos/ecos/packages/hal/powerpc/mv2p/current/src/plf_redboot_linux_exec.c 1970-01-01 01:00:00.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/mv2p/current/src/plf_redboot_linux_exec.c 2004-10-14 17:05:44.000000000 +0200 @@ -0,0 +1,87 @@ +//========================================================================== +// +// redboot_linux_boot.c +// +// RedBoot command to boot Linux +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc. +// Copyright (C) 2002, 2003 Gary Thomas +// Copyright (C) 2003, 2004 Mind n.v. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//####OTHERCOPYRIGHTBEGIN#### +// +// The structure definitions below are taken from include/ppc/platforms/am860.h in +// the Linux kernel, Copyright (c) 2002 Gary Thomas, Copyright (c) 1997 Dan Malek. +// Their presence here is for the express purpose of communication with the Linux +// kernel being booted and is considered 'fair use' by the original author and +// are included with their permission. +// +//####OTHERCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): msalter +// Contributors: gthomas,msalter +// Date: 2002-01-14 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include +#include +#include + +// +// Export system configuration - used when booting a Linux kernel +// Note: this function is expected to set up the fields which are +// platform/variant dependent. It may also override any of the +// architecture common fields (like memory layout, etc) as appropriate +// +externC void +plf_redboot_linux_exec(bd_t *board_info) +{ + board_info->bi_intfreq = CYGHWR_HAL_POWERPC_CPU_SPEED*1000000; + board_info->bi_busfreq = CYGHWR_HAL_POWERPC_MEM_SPEED*1000000; +} + +//========================================================================= +// EOF plf_redboot_linux_exec.c diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/ppc40x/current/ChangeLog ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/ChangeLog --- ecos/ecos/packages/hal/powerpc/ppc40x/current/ChangeLog 2004-09-16 23:50:47.000000000 +0200 +++ ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/ChangeLog 2004-10-15 11:02:09.000000000 +0200 @@ -1,3 +1,19 @@ +2004-10-14 Wouter Cloetens + + * cdl/hal_powerpc_ppc40x.cdl: + * include/var_regs.h: + * src/var_misc.c: + Support for the PPC405 core in the Virtex-II Pro. + Peripherals (I2C, on-chip UARTs, PCI, GPIO, ethernet) are only + available on the 405GP. + + * src/var_misc.c: Call hal_if_init() from hal_platform_init() instead + of from ppc40x hal_variant_init(). + + * src/var_misc.c: + * src/var_intr.c: + Respect value of TCR on PPC405. Needed by PPC405 watchdog support. + 2004-09-16 Gary Thomas * src/hal_diag.c: Assert RTS/DTR modem signals. diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/ppc40x/current/cdl/hal_powerpc_ppc40x.cdl ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/cdl/hal_powerpc_ppc40x.cdl --- ecos/ecos/packages/hal/powerpc/ppc40x/current/cdl/hal_powerpc_ppc40x.cdl 2004-02-26 17:20:12.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/cdl/hal_powerpc_ppc40x.cdl 2004-10-15 11:25:04.000000000 +0200 @@ -105,30 +105,43 @@ cdl_package CYGPKG_HAL_POWERPC_PPC40x { } } + cdl_component CYGHWR_HAL_POWERPC_PPC405_I2C { + display "PPC405GPI2C support" + requires { (CYGHWR_HAL_POWERPC_PPC4XX == "405GP") } + description "Variant I2C support - only for 405GP" + default_value 1 + } + cdl_component CYGHWR_HAL_POWERPC_PPC405_IO { display "Misc I/O support, including diagnostic serial ports" - active_if { (CYGHWR_HAL_POWERPC_PPC4XX == "405GP") } - description "Variant I/O support - only for 405GP" + description "Variant I/O support - implementation provided only for 405GP" default_value 1 - compile hal_diag.c - cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { - display "Number of communication channels on the board" - flavor data - default_value 2+CYGNUM_HAL_PLF_VIRTUAL_VECTOR_COMM_CHANNELS - } - - cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { - display "Debug serial port" - active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE - flavor data - legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 - default_value 0 - description " - The PPC405GP supports multiple serial ports. Additionally, - a platform may define other 'console' devices. This option - chooses which port will be used to connect to a host - running GDB." + cdl_option CYGHWR_HAL_POWERPC_PPC405GP_IO { + display "Misc I/O support, including diagnostic serial ports" + active_if { (CYGHWR_HAL_POWERPC_PPC4XX == "405GP") } + description "Variant I/O support - only for 405GP" + default_value 1 + compile hal_diag.c + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated { CYGNUM_HAL_PLF_VIRTUAL_VECTOR_COMM_CHANNELS + (CYGHWR_HAL_POWERPC_PPC4XX == "405GP") ? 2 : 0 } + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The PPC405GP supports multiple serial ports. Additionally, + a platform may define other 'console' devices. This option + chooses which port will be used to connect to a host + running GDB." } cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/ppc40x/current/include/var_regs.h ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/include/var_regs.h --- ecos/ecos/packages/hal/powerpc/ppc40x/current/include/var_regs.h 2003-10-15 16:37:21.000000000 +0200 +++ ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/include/var_regs.h 2004-09-22 11:21:21.000000000 +0200 @@ -323,7 +323,7 @@ #endif // CYGARC_HAL_COMMON_EXPORT_CPU_MACROS -#if defined(CYGHWR_HAL_POWERPC_PPC4XX_405) || defined(CYGHWR_HAL_POWERPC_PPC4XX_405GP) +#if defined(CYGHWR_HAL_POWERPC_PPC4XX_405GP) // // Memory mapped peripherals // diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/ppc40x/current/src/var_intr.c ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/src/var_intr.c --- ecos/ecos/packages/hal/powerpc/ppc40x/current/src/var_intr.c 2004-02-09 21:24:34.000000000 +0100 +++ ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/src/var_intr.c 2004-10-15 11:27:15.000000000 +0200 @@ -311,8 +311,6 @@ hal_ppc40x_interrupt_set_level(int vecto #if defined(CYGHWR_HAL_POWERPC_PPC4XX_405) || defined(CYGHWR_HAL_POWERPC_PPC4XX_405GP) -cyg_uint32 _hold_tcr = 0; // Shadow of hardware register - externC void hal_variant_IRQ_init(void) { @@ -338,38 +336,36 @@ hal_variant_IRQ_init(void) externC void hal_ppc40x_interrupt_mask(int vector) { - cyg_uint32 exier, tcr; + cyg_uint32 tcr; switch (vector) { case CYGNUM_HAL_INTERRUPT_first...CYGNUM_HAL_INTERRUPT_last: #ifndef HAL_PLF_INTERRUPT_MASK - CYGARC_MFDCR(DCR_UIC0_ER, exier); - exier &= ~(1<<(31-(vector-CYGNUM_HAL_INTERRUPT_405_BASE))); - CYGARC_MTDCR(DCR_UIC0_ER, exier); + { + cyg_uint32 exier; + + CYGARC_MFDCR(DCR_UIC0_ER, exier); + exier &= ~(1<<(31-(vector-CYGNUM_HAL_INTERRUPT_405_BASE))); + CYGARC_MTDCR(DCR_UIC0_ER, exier); + } #else HAL_PLF_INTERRUPT_MASK(vector); #endif break; case CYGNUM_HAL_INTERRUPT_VAR_TIMER: CYGARC_MFSPR(SPR_TCR, tcr); - tcr = _hold_tcr; tcr &= ~TCR_PIE; CYGARC_MTSPR(SPR_TCR, tcr); - _hold_tcr = tcr; break; case CYGNUM_HAL_INTERRUPT_FIXED_TIMER: CYGARC_MFSPR(SPR_TCR, tcr); - tcr = _hold_tcr; tcr &= ~TCR_FIE; CYGARC_MTSPR(SPR_TCR, tcr); - _hold_tcr = tcr; break; case CYGNUM_HAL_INTERRUPT_WATCHDOG_TIMER: CYGARC_MFSPR(SPR_TCR, tcr); - tcr = _hold_tcr; tcr &= ~TCR_WIE; CYGARC_MTSPR(SPR_TCR, tcr); - _hold_tcr = tcr; break; default: break; @@ -379,38 +375,36 @@ hal_ppc40x_interrupt_mask(int vector) externC void hal_ppc40x_interrupt_unmask(int vector) { - cyg_uint32 exier, tcr; + cyg_uint32 tcr; switch (vector) { case CYGNUM_HAL_INTERRUPT_first...CYGNUM_HAL_INTERRUPT_last: #ifndef HAL_PLF_INTERRUPT_UNMASK - CYGARC_MFDCR(DCR_UIC0_ER, exier); - exier |= (1<<(31-(vector-CYGNUM_HAL_INTERRUPT_405_BASE))); - CYGARC_MTDCR(DCR_UIC0_ER, exier); + { + cyg_uint32 exier; + + CYGARC_MFDCR(DCR_UIC0_ER, exier); + exier |= (1<<(31-(vector-CYGNUM_HAL_INTERRUPT_405_BASE))); + CYGARC_MTDCR(DCR_UIC0_ER, exier); + } #else HAL_PLF_INTERRUPT_UNMASK(vector); #endif break; case CYGNUM_HAL_INTERRUPT_VAR_TIMER: CYGARC_MFSPR(SPR_TCR, tcr); - tcr = _hold_tcr; tcr |= TCR_PIE; CYGARC_MTSPR(SPR_TCR, tcr); - _hold_tcr = tcr; break; case CYGNUM_HAL_INTERRUPT_FIXED_TIMER: CYGARC_MFSPR(SPR_TCR, tcr); - tcr = _hold_tcr; tcr |= TCR_FIE; CYGARC_MTSPR(SPR_TCR, tcr); - _hold_tcr = tcr; break; case CYGNUM_HAL_INTERRUPT_WATCHDOG_TIMER: CYGARC_MFSPR(SPR_TCR, tcr); - tcr = _hold_tcr; tcr |= TCR_WIE; CYGARC_MTSPR(SPR_TCR, tcr); - _hold_tcr = tcr; break; default: break; diff --exclude CVS -Naurp ecos/ecos/packages/hal/powerpc/ppc40x/current/src/var_misc.c ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/src/var_misc.c --- ecos/ecos/packages/hal/powerpc/ppc40x/current/src/var_misc.c 2003-09-19 19:11:30.000000000 +0200 +++ ecos-mv2p/ecos/packages/hal/powerpc/ppc40x/current/src/var_misc.c 2004-10-15 11:01:41.000000000 +0200 @@ -67,15 +67,14 @@ externC void hal_ppc405_pci_init(void); #endif externC void hal_ppc40x_clock_initialize(cyg_uint32 period); +#if defined(CYGSEM_HAL_POWERPC_PPC405_I2C) static void hal_ppc405_i2c_init(void); +#endif //-------------------------------------------------------------------------- void hal_variant_init(void) { - // Initialize I/O interfaces - hal_if_init(); - -#if defined(CYGHWR_HAL_POWERPC_PPC4XX_405) || defined(CYGHWR_HAL_POWERPC_PPC4XX_405GP) +#if defined(CYGSEM_HAL_POWERPC_PPC405_I2C) // Initialize I2C controller hal_ppc405_i2c_init(); #endif @@ -177,7 +176,9 @@ cyg_hal_clear_MMU (void) // Clock control - use the programmable (variable period) timer static cyg_uint32 _period; +#if defined(CYGHWR_HAL_POWERPC_PPC4XX_403) extern cyg_uint32 _hold_tcr; // Shadow of TCR register which can't be read +#endif void hal_ppc40x_clock_initialize(cyg_uint32 period) @@ -185,11 +186,16 @@ hal_ppc40x_clock_initialize(cyg_uint32 p cyg_uint32 tcr; // Enable auto-reload - CYGARC_MFSPR(SPR_TCR, tcr); +#if defined(CYGHWR_HAL_POWERPC_PPC4XX_403) tcr = _hold_tcr; +#else + CYGARC_MFSPR(SPR_TCR, tcr); +#endif tcr |= TCR_ARE; CYGARC_MTSPR(SPR_TCR, tcr); +#if defined(CYGHWR_HAL_POWERPC_PPC4XX_403) _hold_tcr = tcr; +#endif // Set up the counter register _period = period; @@ -245,7 +251,7 @@ hal_ppc40x_delay_us(int us) } } -#if defined(CYGHWR_HAL_POWERPC_PPC4XX_405) || defined(CYGHWR_HAL_POWERPC_PPC4XX_405GP) +#if defined(CYGSEM_HAL_POWERPC_PPC405_I2C) //---------------------------------------------------------------------- // I2C Support static void