Index: hal/arm/at91/at91sam7s/current/ChangeLog =================================================================== RCS file: hal/arm/at91/at91sam7s/current/ChangeLog diff -N hal/arm/at91/at91sam7s/current/ChangeLog --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/ChangeLog 19 Feb 2006 20:08:26 -0000 @@ -0,0 +1,52 @@ +2006-01-01 Oliver Munz + Andrew Lunn + + * cdl/hal_arm_at91sam7s.cdl: + * include/hal_platform_ints.h: + * include/hal_platform_setup.h: + * include/plf_io.h: + * include/pkgconf/mlt_arm_at91sam7s256_rom.h: + * include/pkgconf/mlt_arm_at91sam7s256_rom.ldi: + * include/pkgconf/mlt_arm_at91sam7s128_rom.h: + * include/pkgconf/mlt_arm_at91sam7s128_rom.ldi: + * include/pkgconf/mlt_arm_at91sam7s64_rom.h: + * include/pkgconf/mlt_arm_at91sam7s64_rom.ldi: + * include/pkgconf/mlt_arm_at91sam7s32_rom.h: + * include/pkgconf/mlt_arm_at91sam7s32_rom.ldi: + * src/at91sam7s_misc.c: + * misc/redboot_ROM.ecm: + * misc/redboot_RAM.ecm: + * ChangeLog: First import of a hal for the AT91SAM7S family. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2006 eCosCentric Ltd +// Copyright (C) 2006 Andrew Lunn +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== Index: hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl =================================================================== RCS file: hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl diff -N hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl 19 Feb 2006 20:08:27 -0000 @@ -0,0 +1,385 @@ +# ==================================================================== +# +# hal_arm_at91_sam7s.cdl +# +# ARM AT91 SAM7S HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2003 Nick Garnett +## Copyright (C) 2005 eCosCentric Ltd +## Copyright (C) 2005 Andrew Lunn +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: gthomas, tkoeller, nickg, Oliver Munz +# Date: 2005-06-20 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_ARM_AT91SAM7S { + display "Atmel AT91SAM7S HAL" + parent CYGPKG_HAL_ARM + define_header hal_arm_at91sam7s.h + include_dir cyg/hal + hardware + description " + The AT91SAM7S HAL package provides the support needed to run + eCos on an Atmel AT91SAM7S based board." + + compile at91sam7s_misc.c + + requires { CYGHWR_HAL_ARM_AT91 == "AT91SAM7S" } + requires { CYGHWR_HAL_ARM_AT91_FIQ } + requires { CYGHWR_HAL_ARM_AT91SAM7S == "at91sam7s32" implies + CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0 == 0 } + requires { CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2 == 0 } + + implements CYGINT_HAL_ARM_AT91_SERIAL_DBG_HW + implements CYGINT_HAL_ARM_AT91_PIT_HW + implements CYGINT_HAL_ARM_AT91_SYS_INTERRUPT + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " + puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H " + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H " + puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H" + puts $::cdl_header "#define HAL_PLATFORM_CPU \"ARM7TDMI\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Atmel (at91sam7s)\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_option CYGHWR_HAL_ARM_AT91SAM7S { + display "AT91SAM7S variant used" + flavor data + default_value {"at91sam7s256"} + legal_values {"at91sam7s32" "at91sam7s64" "at91sam7s128" + "at91sam7s256"} + description " + The AT91SAM7S microcontroller family has several variants, + the main differences being the amount of on-chip SRAM, + FLASH, peripherals and their layout. This option allows the + platform HALs to select the specific microcontroller + being used." + } + + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants" + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + default_value 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + default_value 100 + } + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + legal_values 1 to 0xffff + calculated ((CYGNUM_HAL_RTC_NUMERATOR * CYGNUM_HAL_ARM_AT91_CLOCK_SPEED/16) / CYGNUM_HAL_RTC_DENOMINATOR / 1000000000) + description " + CYGNUM_HAL_RTC_PERIOD : (CYGNUM_HAL_RTC_NUMERATOR * CYGNUM_HAL_ARM_AT91_CLOCK_SPEED/16) / CYGNUM_HAL_RTC_DENOMINATOR / 1000000000 " + } + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + default_value {"ROM"} + legal_values {"RAM" "ROM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the AT91SAM7S eval board it is possible to build + the system for either RAM bootstrap or ROM bootstrap(s). Select + 'ram' when building programs to load into RAM using onboard + debug software such as Angel or eCos GDB stubs. Select 'rom' + when building a stand-alone application which will be put + into ROM" + } + + + # Real-time clock/counter specifics + cdl_option CYGNUM_HAL_ARM_AT91_CLOCK_SPEED { + display "CPU clock speed" + flavor data + calculated { CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN * + CYGNUM_HAL_ARM_AT91_PLL_MULTIPLIER / + CYGNUM_HAL_ARM_AT91_PLL_DIVIDER / 2} + legal_values { 0 to 220000000 } + description " + The master clock-frequency has to be 48MHz, 96MHz or + 192MHz for the USB to work correctly. The clock setup uses + PLL clock divided by two" + } + + cdl_option CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN { + display "Main oscillator frequency" + flavor data + legal_values { 3000000 to 20000000} + default_value { 20000000 } + description " + What frequency of crystal is clocking the device." + } + + cdl_option CYGNUM_HAL_ARM_AT91_PLL_DIVIDER { + display "Divider for PLL clock" + flavor data + legal_values { 0 to 255 } + default_value 5 + description " + The X-tal clock is divided by this value when generating the + PLL clock" + } + + cdl_option CYGNUM_HAL_ARM_AT91_PLL_MULTIPLIER { + display "Multiplier for PLL clock" + flavor data + legal_values { 0 to 2047 } + default_value 24 + description " + The X-tal clock is multiplied by this value when generating + the PLL clock." + } + + cdl_option CYGNUM_HAL_ARM_AT91_SLOW_CLOCK { + display "Slow clock frequency" + flavor data + default_value { 32768 } + description " + The slow clock is an LC oscilator which runs all the + time. The accuracy of this clock is not very high and + is temperature dependant" + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + default_value 1 + description " + The AT91SAM7S development boards have only one USART serial + port connector even though there are two real serial ports. + Also don't confuse the debug port as a USART serial port. It + needs a different driver." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The AT91SAM7S has two USART serial ports. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The AT91SAM7S board has two USART serial ports. This option + chooses which port will be used for diagnostic output." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + display "Diagnostic serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 38400 + description " + This option selects the baud rate used for the diagnostic port." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD { + display "GDB serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 38400 + description " + This option controls the baud rate used for the GDB connection." + } + + cdl_option CYGBLD_HAL_ARM_AT91_BAUD_DYNAMIC { + display "Dynamic calculation of baud rate" + default_value 0 + description " + The AT91SAM7S has a flexiable clock generation mechanism + where the main clock used to drive peripherals can be + changed during runtime. Such changes affect the serial port + baud rate generaters. Enabling this option includes code + which calculates the baud rate setting dynamically from the + current clock settings. Without this option a static + calculation is performed which assumes the clock frequency + has not been changed." + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "GDB_stubs" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for different varieties of ROM monitor. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + Firstly there is \"Generic\" support which prevents the HAL + from overriding the hardware vectors that it does not use, to + instead allow an installed ROM monitor to handle them. This is + the most basic support which is likely to be common to most + implementations of ROM monitor. + \"GDB_stubs\" provides support when GDB stubs are included in + the ROM monitor or boot ROM." + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + default_value 1 + no_define + description "This option enables the conversion of the Redboot ELF + image to a binary image suitable for ROM programming." + + make -priority 325 { + /bin/redboot.bin : /bin/redboot.elf + $(OBJCOPY) --strip-debug $< $(@:.bin=.img) + $(OBJCOPY) -O srec $< $(@:.bin=.srec) + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "arm-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { (CYGHWR_THUMB ? "-mthumb " : "") . (CYGBLD_ARM_ENABLE_THUMB_INTERWORK ? "-mthumb-interwork " : "") . "-mcpu=arm7tdmi -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which are used to + compile all packages by default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { (CYGHWR_THUMB ? "-mthumb " : "") . (CYGBLD_ARM_ENABLE_THUMB_INTERWORK ? "-mthumb-interwork " : "") . "-mcpu=arm7tdmi -Wl,--gc-sections -Wl,-static -g -nostdlib" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { (CYG_HAL_STARTUP == "RAM") ? \ + "arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_ram" : + "arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { (CYG_HAL_STARTUP == "RAM") ? \ + "" : + "" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { (CYG_HAL_STARTUP == "RAM") ? \ + "" : + "" } + } + } +} Index: hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h diff -N hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h 19 Feb 2006 20:08:27 -0000 @@ -0,0 +1,107 @@ +#ifndef CYGONCE_HAL_PLATFORM_INTS_H +#define CYGONCE_HAL_PLATFORM_INTS_H +//========================================================================== +// +// hal_platform_ints.h +// +// HAL Interrupt and clock assignments for AT91SAM7S +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2006 eCosCentric Ltd +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, Oliver Munz, Andrew Lunn +// Date: 2001-07-12 +// Purpose: Define Interrupt support +// Description: The interrupt specifics for the AT91SAM7Splatform are +// defined here. +// +// Usage: #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGNUM_HAL_INTERRUPT_FIQ 0 + +#define CYGNUM_HAL_INTERRUPT_SYS 1 +#define CYGNUM_HAL_INTERRUPT_PIOA 2 + +#define CYGNUM_HAL_INTERRUPT_ADC 4 +#define CYGNUM_HAL_INTERRUPT_SPI 5 +#define CYGNUM_HAL_INTERRUPT_USART0 6 +#define CYGNUM_HAL_INTERRUPT_USART1 7 +#define CYGNUM_HAL_INTERRUPT_SSC 8 +#define CYGNUM_HAL_INTERRUPT_TWI 9 +#define CYGNUM_HAL_INTERRUPT_PWMC 10 +#define CYGNUM_HAL_INTERRUPT_UDP 11 +#define CYGNUM_HAL_INTERRUPT_TC0 12 +#define CYGNUM_HAL_INTERRUPT_TC1 13 +#define CYGNUM_HAL_INTERRUPT_TC2 14 + +#define CYGNUM_HAL_INTERRUPT_IRQ0 30 +#define CYGNUM_HAL_INTERRUPT_IRQ1 31 + +// Interrupts which are multiplexed on to the System Interrupt +#define CYGNUM_HAL_INTERRUPT_PITC 32 +#define CYGNUM_HAL_INTERRUPT_RTTC 33 +#define CYGNUM_HAL_INTERRUPT_PMC 34 +#define CYGNUM_HAL_INTERRUPT_MC 35 +#define CYGNUM_HAL_INTERRUPT_WDTC 36 +#define CYGNUM_HAL_INTERRUPT_RSTC 37 +#define CYGNUM_HAL_INTERRUPT_DBG 38 + +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 38 + +#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX + 1) + +// The vector used by the Real time clock +#ifdef CYGBLD_HAL_ARM_AT91_TIMER_TC +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TC0 +#endif +#ifdef CYGBLD_HAL_ARM_AT91_TIMER_PIT +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_PITC +#endif + +//---------------------------------------------------------------------------- +// Reset. +__externC void hal_at91_reset_cpu(void); +#define HAL_PLATFORM_RESET() hal_at91_reset_cpu() + +#define HAL_PLATFORM_RESET_ENTRY 0x0000000 + +#endif // CYGONCE_HAL_PLATFORM_INTS_H Index: hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h diff -N hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h 19 Feb 2006 20:08:27 -0000 @@ -0,0 +1,147 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2006 eCosCentric Ltd +// Copy + +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors:gthomas, asl +// Date: 2006-02-18 +// Purpose: AT91SAM7S platform specific support routines +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include +#include + +// Macro to initialise the Memory Controller + .macro _flash_init +__flash_init__: +#if CYGNUM_HAL_ARM_AT91_CLOCK_SPEED > 30000000 + // When the clock is running faster than 30MHz we need a wait state + ldr r0,=AT91_MC + ldr r1,=(AT91_MC_FMR_1FWS) + str r1,[r0,#AT91_MC_FMR] +#endif +#if CYGNUM_HAL_ARM_AT91_CLOCK_SPEED > 60000000 + ldr r1,=(AT91_MC_FMR_2FWS) + str r1,[r0,#AT91_MC_FMR] +#endif + .endm + +// Macro to start the main clock. + .macro _main_clock_init +__main_clock_init__: + ldr r0,=AT91_PMC + // Swap to the slow clock, just to be sure. + ldr r1,=(AT91_PMC_MCKR_PRES_CLK|AT91_PMC_MCKR_SLOW_CLK) + str r1,[r0,#AT91_PMC_MCKR] + // startup time + ldr r1,=(AT91_PMC_MOR_OSCCOUNT(6)|AT91_PMC_MOR_MOSCEN) + str r1,[r0,#AT91_PMC_MOR] + + // Wait for oscilator start timeout +wait_pmc_sr_1: + ldr r1,[r0,#AT91_PMC_SR] + ands r1,r1,#AT91_PMC_SR_MOSCS + beq wait_pmc_sr_1 + + // Set the PLL multiplier and divider. 16 slow clocks go by + // before the LOCK bit is set. */ + ldr r1,=((AT91_PMC_PLLR_DIV(CYGNUM_HAL_ARM_AT91_PLL_DIVIDER))|(AT91_PMC_PLLR_PLLCOUNT(16))|(AT91_PMC_PLLR_MUL(CYGNUM_HAL_ARM_AT91_PLL_MULTIPLIER+1))) + str r1,[r0,#AT91_PMC_PLLR] + + // Wait for PLL locked indication +wait_pmc_sr_2: + ldr r1,[r0,#AT91_PMC_SR] + ands r1,r1,#AT91_PMC_SR_LOCK + beq wait_pmc_sr_2 + + // Enable the PLL clock and set the prescale to 2 */ + ldr r1,=(AT91_PMC_MCKR_PRES_CLK_2|AT91_PMC_MCKR_PLL_CLK) + str r1,[r0,#AT91_PMC_MCKR] + + // Wait for the MCLK ready indication +wait_pmc_sr_3: + ldr r1,[r0,#AT91_PMC_SR] + ands r1,r1,#AT91_PMC_SR_MCKRDY + beq wait_pmc_sr_3 + .endm + +// Remap the flash from address 0x0 and place RAM there instead. + .macro _remap_flash +__remap_flash: + ldr r0,=0x000004 // Use the underfined instruction exception + ldr r1,=0x200004 + ldr r2,[r0] // Save away copies so we can restore them + ldr r3,[r1] + ldr r4,=0xffffff + eor r4,r3,r4 // XOR the contents of 0x20004 + str r4,[r1] // and write it + ldr r5,[r0] // Read from low memory + cmp r5,r4 + beq remap_done + ldr r0,=AT91_MC // Need to do a remap + ldr r5,=1 + str r5,[r0,#AT91_MC_RCR] +remap_done: + str r3,[r1] // restore the value we changed + .endm + +#if defined(CYG_HAL_STARTUP_ROM) + .macro _setup + _flash_init + _main_clock_init + _remap_flash + .endm + +#define PLATFORM_SETUP1 _setup +#else +#define PLATFORM_SETUP1 +#endif + +//----------------------------------------------------------------------------- +// end of hal_platform_setup.h +#endif // CYGONCE_HAL_PLATFORM_SETUP_H Index: hal/arm/at91/at91sam7s/current/include/plf_io.h =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/plf_io.h diff -N hal/arm/at91/at91sam7s/current/include/plf_io.h --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/plf_io.h 19 Feb 2006 20:08:27 -0000 @@ -0,0 +1,151 @@ +#ifndef CYGONCE_HAL_PLF_IO_H +#define CYGONCE_HAL_PLF_IO_H +//============================================================================= +// +// plf_io.h +// +// AT91SAM7S board specific registers +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): tkoeller +// Contributors: andrew lunn, Oliver Munz +// Date: 2005-12-31 +// Purpose: Atmel AT91SAM7S board specific registers +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#define CYGARC_PHYSICAL_ADDRESS(_x_) + +#define AT91_SPI0 0xFFFE0000 + +#define AT91_PIOA 0xfffff400 + +#define AT91_WSTC 0xFFFFFD40 + +// USART + +#define AT91_USART0 0xFFFC0000 +#define AT91_USART1 0xFFFC4000 + +#ifndef __ASSEMBLER__ +#ifdef CYGBLD_HAL_ARM_AT91_BAUD_DYNAMIC +extern cyg_uint32 hal_at91_us_baud(cyg_uint32 baud); +#define AT91_US_BAUD(baud) hal_at91_us_baud(baud) +#endif +#endif // __ASSEMBLER__ + +#define AT91_US_RPR 0x100 // Receive Pointer Register +#define AT91_US_RCR 0x104 // Receive Counter Register +#define AT91_US_TPR 0x108 // Transmit Pointer Register +#define AT91_US_TCR 0x10C // Transmit Counter Register +#define AT91_US_NRPR 0x110 // Next Receive Pointer Register +#define AT91_US_NRCR 0x114 // Next Receive Counter Register +#define AT91_US_NTPR 0x118 // Next Transmit Pointer Register +#define AT91_US_NTCR 0x11C // Next Trsnsmit Counter Register +#define AT91_US_PTCR 0x120 // PDC Transfer Control Register +#define AT91_US_PTSR 0x124 // PDC Transfer Status Register + +// PIO - Programmable I/O + +#define AT91_PIO 0xFFFFF400 + +// AIC - Advanced Interrupt Controller + +#define AT91_AIC 0xFFFFF000 + +// TC - Timer Counter + +#define AT91_TC 0xFFFA0000 + +// Power Management Controller + +#define AT91_PMC 0xFFFFFC00 + +#define AT91_PMC_MOR 0x20 // Main Oscillator Register +#define AT91_PMC_MOR_MOSCEN (1 << 0) // Main Oscillator Enable +#define AT91_PMC_MOR_OSCBYPASS (1 << 1) // Main Oscillator Bypass +#define AT91_PMC_MOR_OSCCOUNT(x) (x << 8) // Slow clocks ticks +#define AT91_PMC_MCFR 0x24 // Main Clock Frequency Register +#define AT91_PMC_PLLR 0x2c // PLL Register +#define AT91_PMC_PLLR_DIV(x) ((x) << 0) // PLL Devide +#define AT91_PMC_PLLR_PLLCOUNT(x) ((x) << 8) // PLL Count +#define AT91_PMC_PLLR_MUL(x) ((x) << 16) // PLL Devide +#define AT91_PMC_PLLR_OUT_0 (0 << 14) +#define AT91_PMC_PLLR_OUT_1 (1 << 14) +#define AT91_PMC_PLLR_OUT_2 (2 << 14) +#define AT91_PMC_PLLR_OUT_3 (3 << 14) +#define AT91_PMC_PLLR_USBDIV_0 (0 << 28) // USB clock is PLL clock / 1 +#define AT91_PMC_PLLR_USBDIV_1 (1 << 28) // USB clock is PLL clock / 2 +#define AT91_PMC_PLLR_USBDIV_2 (2 << 28) // USB clock is PLL clock / 4 +#define AT91_PMC_MCKR 0x30 // Master Clock Register +#define AT91_PMC_MCKR_SLOW_CLK (0 << 0) // Slow clock selected +#define AT91_PMC_MCKR_MAIN_CLK (1 << 0) // Main clock selected +#define AT91_PMC_MCKR_PLL_CLK (3 << 0) // PLL clock selected +#define AT91_PMC_MCKR_PRES_CLK (0 << 2) // divide by 1 +#define AT91_PMC_MCKR_PRES_CLK_2 (1 << 2) // divide by 2 +#define AT91_PMC_MCKR_PRES_CLK_4 (2 << 2) // divide by 4 +#define AT91_PMC_MCKR_PRES_CLK_8 (3 << 2) // divide by 8 +#define AT91_PMC_MCKR_PRES_CLK_16 (4 << 2) // divide by 16 +#define AT91_PMC_MCKR_PRES_CLK_32 (5 << 2) // divide by 32 +#define AT91_PMC_MCKR_PRES_CLK_64 (6 << 2) // divide by 64 +#define AT91_PMC_IER 0x60 // Interrupt Enable Register +#define AT91_PMC_IDR 0x64 // Interrupt Disable Register +#define AT91_PMC_SR 0x68 // Status Register +#define AT91_PMC_SR_MOSCS (1 << 0) // Main oscillator stable +#define AT91_PMC_SR_LOCK (1 << 2) // PLL Locked +#define AT91_PMC_SR_MCKRDY (1 << 3) // MCK is ready to be enabled +#define AT91_PMC_SR_PCK0RDY (1 << 8) // Pad clock 0 is ready to be enabled +#define AT91_PMC_SR_PCK1RDY (1 << 9) // Pad clock 1 is ready to be enabled +#define AT91_PMC_SR_PCK2RDY (1 << 10) // Pad clock 2 is ready to be enabled +#define AT91_PMC_SR_PCK3RDY (1 << 11) // Pad clock 3 is ready to be enabled +#define AT91_PMC_IMR 0x6c // Interrupt Mask Register + +//---------------------------------------------------------------------- +// The platform needs this initialization during the +// hal_hardware_init() function in the varient HAL. +#ifndef __ASSEMBLER__ +extern void hal_plf_hardware_init(void); +#define HAL_PLF_HARDWARE_INIT() \ + hal_plf_hardware_init() +#endif + + + +#endif //CYGONCE_HAL_PLF_IO_H + Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.h =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.h diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.h --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.h 19 Feb 2006 20:08:27 -0000 @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x00200000) +#define CYGMEM_REGION_ram_SIZE (0x08000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x00100000) +#define CYGMEM_REGION_rom_SIZE (0x20000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_bootmon) []; +#endif +#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon)) +#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x00204000 - (size_t) CYG_LABEL_NAME (__heap1)) Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.ldi =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.ldi diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.ldi --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.ldi 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,29 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x00200000, LENGTH = 0x08000 + rom : ORIGIN = 0x00100000, LENGTH = 0x20000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000; + SECTION_rom_vectors (rom, 0x00100000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.h =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.h diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.h --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.h 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x00200000) +#define CYGMEM_REGION_ram_SIZE (0x10000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x00100000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_bootmon) []; +#endif +#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon)) +#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x00210000 - (size_t) CYG_LABEL_NAME (__heap1)) Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.ldi =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.ldi diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.ldi --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.ldi 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,29 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x00200000, LENGTH = 0x10000 + rom : ORIGIN = 0x00100000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000; + SECTION_rom_vectors (rom, 0x00100000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.h =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.h diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.h --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.h 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x00200000) +#define CYGMEM_REGION_ram_SIZE (0x02000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x00100000) +#define CYGMEM_REGION_rom_SIZE (0x08000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_bootmon) []; +#endif +#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon)) +#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x00202000 - (size_t) CYG_LABEL_NAME (__heap1)) Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.ldi =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.ldi diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.ldi --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.ldi 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,29 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x00200000, LENGTH = 0x02000 + rom : ORIGIN = 0x00100000, LENGTH = 0x08000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000; + SECTION_rom_vectors (rom, 0x00100000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.h =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.h diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.h --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.h 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x00200000) +#define CYGMEM_REGION_ram_SIZE (0x04000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x00100000) +#define CYGMEM_REGION_rom_SIZE (0x10000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_bootmon) []; +#endif +#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon)) +#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x00204000 - (size_t) CYG_LABEL_NAME (__heap1)) Index: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.ldi =================================================================== RCS file: hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.ldi diff -N hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.ldi --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.ldi 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,29 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x00200000, LENGTH = 0x04000 + rom : ORIGIN = 0x00100000, LENGTH = 0x10000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000; + SECTION_rom_vectors (rom, 0x00100000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} Index: hal/arm/at91/at91sam7s/current/misc/redboot_RAM.ecm =================================================================== RCS file: hal/arm/at91/at91sam7s/current/misc/redboot_RAM.ecm diff -N hal/arm/at91/at91sam7s/current/misc/redboot_RAM.ecm --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/misc/redboot_RAM.ecm 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,78 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware at91sam7s ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_AT91 current ; + package -hardware CYGPKG_DEVS_FLASH_AT91SAM7S current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 6144 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGOPT_REDBOOT_FIS { + user_value 1 +}; + +cdl_component CYGSEM_REDBOOT_FLASH_CONFIG { + user_value 1 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG { + user_value 0 +}; + +cdl_option CYGNUM_REDBOOT_FLASH_CONFIG_BLOCK { + user_value -16 +}; + + +cdl_option CYGBLD_BUILD_REDBOOT_WITH_EXEC { + user_value 0 +}; + +cdl_option CYGBLD_DEV_FLASH_AT91SAM7S_LOCKING { + user_value 0 +}; + +cdl_option CYGNUM_REDBOOT_FIS_DIRECTORY_BLOCK { + user_value -24 +}; + +cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE { + user_value 0x15000 +}; \ No newline at end of file Index: hal/arm/at91/at91sam7s/current/misc/redboot_ROM.ecm =================================================================== RCS file: hal/arm/at91/at91sam7s/current/misc/redboot_ROM.ecm diff -N hal/arm/at91/at91sam7s/current/misc/redboot_ROM.ecm --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/misc/redboot_ROM.ecm 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,86 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware at91sam7s ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_AT91 current ; + package -hardware CYGPKG_DEVS_FLASH_AT91SAM7S current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 6144 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGOPT_REDBOOT_FIS { + user_value 1 +}; + +cdl_component CYGSEM_REDBOOT_FLASH_CONFIG { + user_value 1 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG { + user_value 0 +}; + +cdl_option CYGNUM_REDBOOT_FLASH_CONFIG_BLOCK { + user_value -16 +}; + + +cdl_option CYGBLD_BUILD_REDBOOT_WITH_EXEC { + user_value 0 +}; + +cdl_option CYGBLD_DEV_FLASH_AT91SAM7S_LOCKING { + user_value 0 +}; + +cdl_option CYGNUM_REDBOOT_FIS_DIRECTORY_BLOCK { + user_value -24 +}; + +cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE { + user_value 0x15000 +}; \ No newline at end of file Index: hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c =================================================================== RCS file: hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c diff -N hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c 19 Feb 2006 20:08:28 -0000 @@ -0,0 +1,184 @@ +/*========================================================================== +// +// at91sam7s_misc.c +// +// HAL misc board support code for Atmel AT91sam7s +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2003 Nick Garnett +// Copyright (C) 2006 eCosCentric Ltd +// Copyright (C) 2006 Andrew Lunn +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov, nickg, tkoeller, Oliver Munz, Andrew Lunn +// Date: 2001-07-12 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // IO macros +#include // Register state info +#include +#include // necessary? +#include +#include // calling interface +#include // helper functions +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include // HAL ISR support +#endif + +// The development board has four LEDs +void +hal_at91_led (int val) +{ + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PPUDR, 0x0000000f); // Disable pull ups + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_OER, 0x0000000f); // Enable Output + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PER, 0x0000000f); // Enable Output + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_ASR, 0x0000000f); + + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_SODR, 0x0000000f); // All off + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_CODR, (val & 0xf)); +} + +void +hal_at91_set_leds (int val) +{ + hal_at91_led(val); +} + +// ------------------------------------------------------------------------- +// Hardware init + +void hal_plf_hardware_init (void) +{ + /* Enable the Serial devices to driver the serial port pins */ + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PDR, + AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0); + + /* Set the serial port pins to PIOA */ + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_ASR, + AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0); + +#if !defined(CYGHWR_HAL_ARM_AT91SAM7S_at91sam7s32) + /* Enable the Serial devices to driver the serial port pins */ + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PDR, + AT91_PIO_PSR_RXD1 | AT91_PIO_PSR_TXD1); + + /* Set the serial port pins to PIOA */ + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_ASR, + AT91_PIO_PSR_RXD1 | AT91_PIO_PSR_TXD1); +#endif + + /* Setup the Reset controller. Allow user resets */ + HAL_WRITE_UINT32(AT91_RST+AT91_RST_RMR, + AT91_RST_RMR_URSTEN | + 10 << 8 | + AT91_RST_RMR_KEY); + +#ifdef CYGBLD_HAL_ARM_AT91_SERIAL_UART + /* Enable peripheral clocks for USART 0 and 1 if they are to be used */ + HAL_WRITE_UINT32(AT91_PMC+AT91_PMC_PCER, + AT91_PMC_PCER_US0 | + AT91_PMC_PCER_US1 | + CYGNUM_HAL_INTERRUPT_SYS); +#endif + +#ifdef CYGBLD_HAL_ARM_AT91_TIMER_TC + /* Enable peripheral clocks for TC 0 and 1 if they are to be used */ + HAL_WRITE_UINT32(AT91_PMC+AT91_PMC_PCER, + AT91_PMC_PCER_TC0 | + AT91_PMC_PCER_TC2); +#endif + +#ifndef CYGPKG_IO_WATCHDOG + /* Disable the watchdog. The eCos philosophy is that the watchdog is + disabled unless the watchdog driver is used to enable it. + Whoever if we disable it here we cannot re-enable it in the + watchdog driver, hence the conditional compilation. */ + HAL_WRITE_UINT32(AT91_WDTC + AT91_WDTC_WDMR, AT91_WDTC_WDMR_DIS); +#endif +} + +// Calculate the baud value to be programmed into the serial port baud +// rate generators. This function will determine what the clock speed +// is that is driving the generator so it can be used in situations +// when the application dynamically changes the clock speed. +cyg_uint32 +hal_at91_us_baud(cyg_uint32 baud_rate) +{ + cyg_uint32 val, pll; + cyg_uint32 main_clock = 0; + cyg_uint32 baud_value = 0; + + HAL_READ_UINT32((AT91_PMC+AT91_PMC_MCKR), val); + switch (val & 0x03) { + /* Slow clock */ + case AT91_PMC_MCKR_SLOW_CLK: + main_clock = CYGNUM_HAL_ARM_AT91_SLOW_CLOCK; + break; + + /* Main clock */ + case AT91_PMC_MCKR_MAIN_CLK: + main_clock = CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN; + break; + /* PLL */ + case AT91_PMC_MCKR_PLL_CLK: + HAL_READ_UINT32((AT91_PMC+AT91_PMC_PLLR), pll); + main_clock = CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN * + (((pll & 0x7FF0000) >> 16) - 1) / (pll & 0xFF); + break; + } + + // Process prescale + val = (val & 0x1C) >> 2; + main_clock = main_clock >> val; + + /* Define the baud rate divisor register, (round) */ + baud_value = (main_clock/(8*baud_rate)+1)/2; + + return baud_value; +} + +//-------------------------------------------------------------------------- +// EOF at91sam7s_misc.c