More AT91SAM7S clock fixes

[Andrew Lunn <andrew at lunn dot ch>]

Here is another AT91SAM7S fix. This builds on top of yesterdays fix of
the PLL setting. The crystal on the development board is not what i
thought it was which caused the baud rate generators to give the wrong
baud once the PLL was correctly configured. This patch fixes the CDL
default for the crystal and the PLL settings so that about the same
clock is acheived, which should be USB compatible. 

        Andrew

Attachment: at91sam7s.clock.diff
Description: Text document