diff -rbup 28fxxx/current/cdl/flash_intel_28fxxx.cdl 28fxxx.modified/current/cdl/flash_intel_28fxxx.cdl --- 28fxxx/current/cdl/flash_intel_28fxxx.cdl 2006-11-21 10:28:13.000000000 +0100 +++ 28fxxx.modified/current/cdl/flash_intel_28fxxx.cdl 2006-11-21 10:34:08.000000000 +0100 @@ -139,6 +139,40 @@ cdl_package CYGPKG_DEVS_FLASH_INTEL_28FX part in the family." } + cdl_option CYGHWR_DEVS_FLASH_INTEL_28F128K3 { + display "Intel 28F128K3 flash memory support" + default_value 0 + implements CYGHWR_IO_FLASH_BLOCK_LOCKING + implements CYGINT_DEVS_FLASH_INTEL_VARIANTS + description " + When this option is enabled, the Intel flash driver will be + able to recognize and handle the 28F128K3 + part in the family." + } + + cdl_option CYGHWR_DEVS_FLASH_INTEL_28F128P30 { + display "Intel 28F128P30 flash memory support" + default_value 0 + implements CYGHWR_IO_FLASH_BLOCK_LOCKING + implements CYGINT_DEVS_FLASH_INTEL_VARIANTS + implements CYGHWR_DEVS_FLASH_INTEL_BUFFERED_WRITES + description " + When this option is enabled, the Intel flash driver will be + able to recognize and handle the 28F128P30 + part in the family." + } + + cdl_option CYGHWR_DEVS_FLASH_INTEL_28F128J3 { + display "Intel 28F128J3 flash memory support" + default_value 0 + implements CYGHWR_IO_FLASH_BLOCK_LOCKING + implements CYGINT_DEVS_FLASH_INTEL_VARIANTS + description " + When this option is enabled, the Intel flash driver will be + able to recognize and handle the 28F128J3 + part in the family." + } + cdl_option CYGHWR_DEVS_FLASH_INTEL_28F800B5 { display "Intel 28F800B5 flash memory support" default_value 0 diff -rbup 28fxxx/current/ChangeLog 28fxxx.modified/current/ChangeLog --- 28fxxx/current/ChangeLog 2006-11-21 10:24:25.000000000 +0100 +++ 28fxxx.modified/current/ChangeLog 2006-11-21 10:40:08.000000000 +0100 @@ -1,3 +1,7 @@ +2006-11-21 Alexander Neundorf + * cdl/flash_intel_28fxxx.cdl, include/flash_28fxxx_parts.inl: + Add Intel 28F128K3, 28F128P30 and 28F128J3 parts. + 2006-11-17 Alexander Neundorf * cdl/flash_intel_28fxxx.cdl, include/flash_28fxxx.inl: diff -rbup 28fxxx/current/include/flash_28fxxx_parts.inl 28fxxx.modified/current/include/flash_28fxxx_parts.inl --- 28fxxx/current/include/flash_28fxxx_parts.inl 2006-11-21 10:27:47.000000000 +0100 +++ 28fxxx.modified/current/include/flash_28fxxx_parts.inl 2006-11-21 10:35:16.000000000 +0100 @@ -194,6 +194,48 @@ }, #endif +#ifdef CYGHWR_DEVS_FLASH_INTEL_28F128K3 + { + device_id : FLASHWORD(0x8802), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 128, + device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1), + locking : true, + buffered_w : true, + bootblock : false, + banked : false + }, +#endif + +#ifdef CYGHWR_DEVS_FLASH_INTEL_28F128P30 + { + device_id : FLASHWORD(0x8818), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 128, + device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1), + locking : true, + buffered_w : true, + bootblock : false, + banked : false + }, +#endif + +#ifdef CYGHWR_DEVS_FLASH_INTEL_28F128J3 + { + device_id : FLASHWORD(0x18), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 128, + device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1), + locking : true, + buffered_w : true, + bootblock : false, + banked : false + }, +#endif + #ifdef CYGHWR_DEVS_FLASH_INTEL_28F160S5 { // 28F160S5 device_id : FLASHWORD(0x00d0),