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Fixed some bugs in hal_io.h
- From: David Fernandez <dfernandez at cct dot co dot uk>
- To: ecos-patches at ecos dot sourceware dot org
- Date: Mon, 18 Dec 2006 09:35:39 +0000
- Subject: Fixed some bugs in hal_io.h
- Organization: Concurrent Technologies, Plc
- Reply-to: dfernandez at cct dot co dot uk
Hi there,
This fixes some bugs in hal_io.h regarding the STRING macros that were
lacking the "rep" prefix. It also adds memory string macros, and does a
slight reformat to keep everything with 80 columns.
Have fun.
David Fernandez
Index: hal/i386/arch/current/include/hal_io.h
===================================================================
RCS file: /home/cvs/cvsroot/dfernandez/Projects/ecos/packages/hal/i386/arch/current/include/hal_io.h,v
retrieving revision 1.1.1.1
diff -u -5 -B -b -w -r1.1.1.1 hal_io.h
--- hal/i386/arch/current/include/hal_io.h 2006/06/26 10:53:35 1.1.1.1
+++ hal/i386/arch/current/include/hal_io.h 2006/12/18 09:31:28
@@ -72,28 +73,28 @@
//-----------------------------------------------------------------------------
// BYTE Register access.
// Individual and vectorized access to 8 bit registers.
#define HAL_READ_UINT8( _register_, _value_ ) \
-CYG_MACRO_START \
-{ \
- asm volatile ( "xor %%eax,%%eax ;" \
- "inb %%dx, %%al" \
+({ \
+ asm volatile( \
+ " xor %%eax,%%eax \n" \
+ " inb %%dx, %%al \n" \
: "=a" (_value_) \
: "d"(_register_) \
); \
-} \
-CYG_MACRO_END
+ (_value_); \
+})
#define HAL_WRITE_UINT8( _register_, _value_ ) \
CYG_MACRO_START \
-{ \
- asm volatile ( "outb %%al,%%dx" \
+ asm volatile( \
+ " outb %%al,%%dx \n" \
: \
- : "a" (_value_), "d"(_register_) \
+ : "a" (_value_), \
+ "d" (_register_) \
); \
-} \
CYG_MACRO_END
#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
! Not supported MACRO ! \
@@ -104,48 +105,57 @@
! Not supported MACRO ! \
CYG_MACRO_END
#define HAL_READ_UINT8_STRING( _register_, _buf_, _count_) \
CYG_MACRO_START \
- asm volatile ( "insb" \
- : \
- : "c" (_count_), "d"(_register_), "D"(_buf_) \
+ typedef volatile struct { CYG_BYTE m[_count_]; } *mp; \
+ asm volatile( \
+ " rep insb \n" \
+ : "=m" (*(mp) (_buf_)) \
+ : "c" (_count_), \
+ "d" (_register_), \
+ "D" (_buf_) \
); \
CYG_MACRO_END
#define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_) \
CYG_MACRO_START \
- asm volatile ( "outsb" \
- : \
- : "c" (_count_), "d"(_register_), "S"(_buf_) \
+ typedef volatile struct { CYG_BYTE m[_count_]; } *mp; \
+ asm volatile( \
+ " rep outsb \n" \
+ : \
+ : "c" (_count_), \
+ "d" (_register_), \
+ "S" (_buf_), \
+ "m" (*(mp) (_buf_)) \
); \
CYG_MACRO_END
//-----------------------------------------------------------------------------
// 16 bit access.
// Individual and vectorized access to 16 bit registers.
#define HAL_READ_UINT16( _register_, _value_ ) \
-CYG_MACRO_START \
-{ \
- asm volatile ( "xor %%eax,%%eax ;" \
- "inw %%dx, %%ax" \
+({ \
+ asm volatile( \
+ " xor %%eax,%%eax \n" \
+ " inw %%dx, %%ax \n" \
: "=a" (_value_) \
: "d"(_register_) \
); \
-} \
-CYG_MACRO_END
+ (_value_); \
+})
#define HAL_WRITE_UINT16( _register_, _value_ ) \
CYG_MACRO_START \
-{ \
- asm volatile ( "outw %%ax,%%dx" \
+ asm volatile( \
+ " outw %%ax,%%dx \n" \
: \
- : "a" (_value_), "d"(_register_) \
+ : "a" (_value_), \
+ "d" (_register_) \
); \
-} \
CYG_MACRO_END
#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
! Not supported MACRO ! \
@@ -157,48 +166,57 @@
! Not supported MACRO ! \
CYG_MACRO_END
#define HAL_READ_UINT16_STRING( _register_, _buf_, _count_) \
CYG_MACRO_START \
- asm volatile ( "insw" \
- : \
- : "c" (_count_), "d"(_register_), "D"(_buf_) \
+ typedef volatile struct { CYG_UINT16 m[_count_]; } *mp; \
+ asm volatile( \
+ " rep insw \n" \
+ : "=m" (*(mp) (_buf_)) \
+ : "c" (_count_), \
+ "d" (_register_), \
+ "D" (_buf_) \
); \
CYG_MACRO_END
#define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_) \
CYG_MACRO_START \
- asm volatile ( "outsw" \
- : \
- : "c" (_count_), "d"(_register_), "S"(_buf_) \
+ typedef volatile struct { CYG_UINT16 m[_count_]; } *mp; \
+ asm volatile( \
+ " rep outsw \n" \
+ : \
+ : "c" (_count_), \
+ "d" (_register_), \
+ "S" (_buf_), \
+ "m" (*(mp) (_buf_)) \
); \
CYG_MACRO_END
//-----------------------------------------------------------------------------
// 32 bit access.
// Individual and vectorized access to 32 bit registers.
#define HAL_READ_UINT32( _register_, _value_ ) \
-CYG_MACRO_START \
-{ \
- asm volatile ( "inl %%dx, %%eax" \
+({ \
+ asm volatile( \
+ " inl %%dx, %%eax \n" \
: "=a" (_value_) \
: "d"(_register_) \
); \
-} \
-CYG_MACRO_END
+ (_value_); \
+})
#define HAL_WRITE_UINT32( _register_, _value_ ) \
CYG_MACRO_START \
-{ \
- asm volatile ( "outl %%eax,%%dx" \
+ asm volatile( \
+ " outl %%eax,%%dx \n" \
: \
- : "a" (_value_), "d"(_register_) \
+ : "a" (_value_), \
+ "d" (_register_) \
); \
-} \
CYG_MACRO_END
#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
! Not supported MACRO ! \
@@ -209,21 +227,30 @@
! Not supported MACRO ! \
CYG_MACRO_END
#define HAL_READ_UINT32_STRING( _register_, _buf_, _count_) \
CYG_MACRO_START \
- asm volatile ( "insl" \
- : \
- : "c" (_count_), "d"(_register_), "D"(_buf_) \
+ typedef volatile struct { CYG_UINT32 m[_count_]; } *mp; \
+ asm volatile( \
+ " rep insl \n" \
+ : "=m" (*(mp) (_buf_)) \
+ : "c" (_count_), \
+ "d" (_register_), \
+ "D" (_buf_) \
); \
CYG_MACRO_END
#define HAL_WRITE_UINT32_STRING( _register_, _buf_, _count_) \
CYG_MACRO_START \
- asm volatile ( "outsl" \
- : \
- : "c" (_count_), "d"(_register_), "S"(_buf_) \
+ typedef volatile struct { CYG_UINT32 m[_count_]; } *mp; \
+ asm volatile( \
+ " outsl \n" \
+ : \
+ : "c" (_count_), \
+ "d" (_register_), \
+ "S" (_buf_), \
+ "m" (*(mp) (_buf)) \
); \
CYG_MACRO_END
//-----------------------------------------------------------------------------
@@ -225,20 +252,70 @@
); \
CYG_MACRO_END
//-----------------------------------------------------------------------------
-
// Macros for acessing shared memory structures
-#define HAL_READMEM_UINT8( _reg_, _val_ ) ((_val_) = *((volatile CYG_BYTE *)(_reg_)))
-#define HAL_WRITEMEM_UINT8( _reg_, _val_ ) (*((volatile CYG_BYTE *)(_reg_)) = (_val_))
+#define HAL_READMEM_UINT8( _reg_, _val_ ) \
+ ((_val_) = *((volatile CYG_BYTE *)(_reg_)))
+#define HAL_WRITEMEM_UINT8( _reg_, _val_ ) \
+ (*((volatile CYG_BYTE *)(_reg_)) = (_val_))
+
+#define HAL_READMEM_UINT16( _reg_, _val_ ) \
+ ((_val_) = *((volatile CYG_WORD16 *)(_reg_)))
+#define HAL_WRITEMEM_UINT16( _reg_, _val_ ) \
+ (*((volatile CYG_WORD16 *)(_reg_)) = (_val_))
+
+#define HAL_READMEM_UINT32( _reg_, _val_ ) \
+ ((_val_) = *((volatile CYG_WORD32 *)(_reg_)))
+#define HAL_WRITEMEM_UINT32( _reg_, _val_ ) \
+ (*((volatile CYG_WORD32 *)(_reg_)) = (_val_))
+
+#define HAL_STRCOPY_UINT32( _va1_, _va2_, _count_) \
+CYG_MACRO_START \
+ typedef volatile struct { CYG_BYTE m[_count_]; \
+ } *mp; \
+ asm volatile( \
+ " rep movsl \n" \
+ : \
+ : "=m" (*(mp) (_va2_)) \
+ : "c" (_count_), \
+ "S" (_va1_), \
+ "D" (_va2_), \
+ "m" (*(mp) (_va1_)) \
+ ); \
+CYG_MACRO_END
-#define HAL_READMEM_UINT16( _reg_, _val_ ) ((_val_) = *((volatile CYG_WORD16 *)(_reg_)))
-#define HAL_WRITEMEM_UINT16( _reg_, _val_ ) (*((volatile CYG_WORD16 *)(_reg_)) = (_val_))
+#define HAL_STRCOPY_UINT16( _va1_, _va2_, _count_) \
+CYG_MACRO_START \
+ typedef volatile struct { CYG_UINT16 m[_count_];\
+ } *mp; \
+ asm volatile( \
+ " rep movsw \n" \
+ : \
+ : "=m" (*(mp) (_va2_)) \
+ : "c" (_count_), \
+ "S" (_va1_), \
+ "D" (_va2_), \
+ "m" (*(mp) (_va1_)) \
+ ); \
+CYG_MACRO_END
+
+#define HAL_STRCOPY_UINT8( _va1_, _va2_, _count_ ) \
+CYG_MACRO_START \
+ typedef volatile struct { CYG_UINT32 m[_count_];\
+ } *mp; \
+ asm volatile( \
+ " rep movsb \n" \
+ : "=m" (*(mp) (_va2_)) \
+ : "c" (_count_), \
+ "S" (_va1_), \
+ "D" (_va2_), \
+ "m" (*(mp) (_va1_)) \
+ ); \
+CYG_MACRO_END
-#define HAL_READMEM_UINT32( _reg_, _val_ ) ((_val_) = *((volatile CYG_WORD32 *)(_reg_)))
-#define HAL_WRITEMEM_UINT32( _reg_, _val_ ) (*((volatile CYG_WORD32 *)(_reg_)) = (_val_))
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_HAL_IO_H
// End of hal_io.h