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ecos/packages/hal/arm/at91/at91sam7s/current
- From: Jürgen Lambrecht <J dot Lambrecht at televic dot com>
- To: ecos-patches at sources dot redhat dot com
- Date: Thu, 14 Aug 2008 09:40:55 +0200
- Subject: ecos/packages/hal/arm/at91/at91sam7s/current
- Organization: Televic
Hello,
I'm busy putting our arm9 platform (based on ronetix SAM9 board) in our
ecos cvs. So I fixed some small issues in the sam7s plf_io.h (I'm making
a sam9 one).
I searched complete ecos/packages for AT91_WSTC and it is not used: it
is a typo: AT91_WDTC is the correct name for the address, and is already
in var_io.h.
I created the 2 patches in the same directories as where the files are.
Kind regards,
Jürgen
2008-08-14 J?ürgen Lambrecht <J.Lambrecht@televic.com>
* include/plf_io.h: removed AT91_SPI_MR_MODFDIS, AT91_WSTC
(AT91_WDTC), AT91_AIC because already in var_io.h. Fixed typo.
--- C:\Documents and Settings\JL.TELEVIC\Local Settings\Temp\ChangeLog_1.1.1.1_47 2008-08-14 09:30:19.000000000 +-0200
+++ F:\version\vcs\c\ims\std_ims\ecos\packages\hal\arm\at91\at91sam7s\current\ChangeLog 2008-08-14 09:17:41.000000000 +-0200
@@ -1,6 +1,11 @@
+2008-08-14 Jürgen Lambrecht <J.Lambrecht@televic.com>
+
+ * include/plf_io.h: removed AT91_SPI_MR_MODFDIS, AT91_WSTC
+ (AT91_WDTC), AT91_AIC because already in var_io.h. Fixed typo.
+
2008-05-11 James G. Smith <jsmith@rallysmith.co.uk
Andrew Lunn <andrew@lunn.ch>
* cdl/hal_arm_at91sam7s.cdl: CDL for crystal vs clock signal.
* include/hal_platform_setup.h: Rework flash wait states to remove
redundant code when running at > 60MHz. Support clock signal input
--- C:\Documents and Settings\JL.TELEVIC\Local Settings\Temp\plf_io_1.1.1.1_46.h 2008-08-14 08:55:46.000000000 +-0200
+++ F:\version\vcs\c\ims\std_ims\ecos\packages\hal\arm\at91\at91sam7s\current\include\plf_io.h 2008-08-13 17:39:34.000000000 +-0200
@@ -59,34 +59,29 @@
#ifdef CYGHWR_HAL_ARM_AT91SAM7X
#define AT91_SPI1 0xFFFE4000
#endif
#define AT91_SPI AT91_SPI0
-//Extra SPI control bits
-#define AT91_SPI_MR_MODFDIS (1<<4)
-
// DMA registers
#define AT91_SPI_RPR 0x100 // Receive Pointer Register
#define AT91_SPI_RCR 0x104 // Receive Counter Register
#define AT91_SPI_TPR 0x108 // Transmit Pointer Register
#define AT91_SPI_TCR 0x10C // Transmit Counter Register
#define AT91_SPI_NRPR 0x110 // Next Receive Pointer Register
#define AT91_SPI_NRCR 0x114 // Next Receive Counter Register
#define AT91_SPI_NTPR 0x118 // Next Transmit Pointer Register
-#define AT91_SPI_NTCR 0x11C // Next Trsnsmit Counter Register
+#define AT91_SPI_NTCR 0x11C // Next Transmit Counter Register
#define AT91_SPI_PTCR 0x120 // PDC Transfer Control Register
#define AT91_SPI_PTSR 0x124 // PDC Transfer Status Register
// Peripheral Input/Output Controllers
#define AT91_PIOA 0xFFFFF400
#ifdef CYGHWR_HAL_ARM_AT91SAM7X
#define AT91_PIOB 0xFFFFF600
#endif
-
-#define AT91_WSTC 0xFFFFFD40
// USART
#define AT91_USART0 0xFFFC0000
#define AT91_USART1 0xFFFC4000
@@ -107,23 +102,19 @@
#define AT91_US_RCR 0x104 // Receive Counter Register
#define AT91_US_TPR 0x108 // Transmit Pointer Register
#define AT91_US_TCR 0x10C // Transmit Counter Register
#define AT91_US_NRPR 0x110 // Next Receive Pointer Register
#define AT91_US_NRCR 0x114 // Next Receive Counter Register
#define AT91_US_NTPR 0x118 // Next Transmit Pointer Register
-#define AT91_US_NTCR 0x11C // Next Trsnsmit Counter Register
+#define AT91_US_NTCR 0x11C // Next Transmit Counter Register
#define AT91_US_PTCR 0x120 // PDC Transfer Control Register
#define AT91_US_PTSR 0x124 // PDC Transfer Status Register
// PIO - Programmable I/O
#define AT91_PIO AT91_PIOA
-
-// AIC - Advanced Interrupt Controller
-
-#define AT91_AIC 0xFFFFF000
// TC - Timer Counter
#define AT91_TC 0xFFFA0000
// Power Management Controller