diff -ruN ecos_web_cvs/ecos/packages/devs/wallclock/arm/lpc2xxx/current/ChangeLog ecos/ecos/packages/devs/wallclock/arm/lpc2xxx/current/ChangeLog --- ecos_web_cvs/ecos/packages/devs/wallclock/arm/lpc2xxx/current/ChangeLog 2008-07-12 17:54:31.000000000 +0200 +++ ecos/ecos/packages/devs/wallclock/arm/lpc2xxx/current/ChangeLog 2008-11-01 21:53:57.562500000 +0100 @@ -1,3 +1,9 @@ +2008-11-01 Uwe Kindler + + * cdl/lpc2xxx_wallclock.cdl: Moved CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREINT + and CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREFRAC to lpc2xxx_wallclock.cxx + * src/lpc2xxx_wallclock.cxx: Some small changes to support LPC24xx devices + 2007-07-12 Hans Rosenfeld * lpc2xxx: driver for on-chip RTC unit diff -ruN ecos_web_cvs/ecos/packages/devs/wallclock/arm/lpc2xxx/current/cdl/lpc2xxx_wallclock.cdl ecos/ecos/packages/devs/wallclock/arm/lpc2xxx/current/cdl/lpc2xxx_wallclock.cdl --- ecos_web_cvs/ecos/packages/devs/wallclock/arm/lpc2xxx/current/cdl/lpc2xxx_wallclock.cdl 2008-07-12 17:54:31.000000000 +0200 +++ ecos/ecos/packages/devs/wallclock/arm/lpc2xxx/current/cdl/lpc2xxx_wallclock.cdl 2008-09-20 20:03:19.500000000 +0200 @@ -53,7 +53,7 @@ parent CYGPKG_IO_WALLCLOCK active_if CYGPKG_IO_WALLCLOCK - active_if CYGPKG_HAL_ARM_LPC2XXX + active_if CYGPKG_HAL_ARM_LPC2XXX || CYGPKG_HAL_ARM_LPC24XX requires { CYGHWR_HAL_ARM_LPC2XXX_IDLE_PWRSAVE == 0 } compile lpc2xxx_wallclock.cxx @@ -68,19 +68,4 @@ default_value 1 implements CYGINT_WALLCLOCK_IMPLEMENTATIONS } - - cdl_option CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREINT { - display "RTC prescaler integer portion" - flavor data - calculated { ((CYGNUM_HAL_ARM_LPC2XXX_CLOCK_SPEED / - CYGNUM_HAL_ARM_LPC2XXX_VPBDIV) / 32768) - 1 } - } - - cdl_option CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREFRAC { - display "RTC prescaler fractional portion" - flavor data - calculated { ((CYGNUM_HAL_ARM_LPC2XXX_CLOCK_SPEED / - CYGNUM_HAL_ARM_LPC2XXX_VPBDIV) - - ((CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREINT + 1) * 32768)) } - } } diff -ruN ecos_web_cvs/ecos/packages/devs/wallclock/arm/lpc2xxx/current/src/lpc2xxx_wallclock.cxx ecos/ecos/packages/devs/wallclock/arm/lpc2xxx/current/src/lpc2xxx_wallclock.cxx --- ecos_web_cvs/ecos/packages/devs/wallclock/arm/lpc2xxx/current/src/lpc2xxx_wallclock.cxx 2008-07-12 17:54:31.000000000 +0200 +++ ecos/ecos/packages/devs/wallclock/arm/lpc2xxx/current/src/lpc2xxx_wallclock.cxx 2008-09-20 20:07:35.343750000 +0200 @@ -2,7 +2,7 @@ // // lpc2xxx_wallclock.cxx // -// Wallclock implementation for LPC2xxx +// Wallclock implementation for LPC2xxx and LPC24xxx // //========================================================================== //####ECOSGPLCOPYRIGHTBEGIN#### @@ -40,9 +40,9 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): Hans Rosenfeld -// Contributors: +// Contributors: Uwe Kindler #include +// +// The LPC2xxx variant HAL provides the CPU clock and the peripheral divider +// VPBDIV. The LPC24xx variant HAL provides the RTC clock directly be means +// of CYGNUM_HAL_ARM_LPC24XX_RTC_CLK. +// +#ifdef CYGNUM_HAL_ARM_LPC2XXX_VPBDIV +#define LPC2XXX_RTC_CLK (CYGNUM_HAL_ARM_LPC2XXX_CLOCK_SPEED / \ + CYGNUM_HAL_ARM_LPC2XXX_VPBDIV) +#endif // CYGNUM_HAL_ARM_LPC2XXX_VPBDIV + +#ifdef CYGNUM_HAL_ARM_LPC24XX_RTC_CLK +#define LPC2XXX_RTC_CLK (CYGNUM_HAL_ARM_LPC24XX_RTC_CLK) +#endif // CYGNUM_HAL_ARM_LPC2XXX_VPBDIV + + +#define CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREINT \ + ((LPC2XXX_RTC_CLK / 32768) - 1) + +#define CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREFRAC \ + (LPC2XXX_RTC_CLK - \ + ((CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREINT + 1) * 32768)) + + + /* * I don't like to write LOTS OF CAPITALIZED TEXT. * This code is intended for LPC2xxx processors _only_, so there is nothing @@ -101,7 +125,9 @@ rtc->ciir = 0x0; rtc->amr = 0xf; - /* initialize prescaler */ + // initialize prescaler - if the RTC id driven by an external 32.768 crystal + // clock then initializing the prescaler is not required but writing the + // registers here should not cause any trouble rtc->preint = CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREINT; rtc->prefrac = CYGNUM_HAL_ARM_LPC2XXX_RTCDEV_PREFRAC;