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Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
- From: Sergei Gavrikov <sergei dot gavrikov at gmail dot com>
- To: Andrew Lunn <andrew at lunn dot ch>
- Cc: eCos patches list <ecos-patches at ecos dot sourceware dot org>
- Date: Sun, 23 Nov 2008 18:05:50 +0200
- Subject: Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
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- References: <20081103205406.GA9692@ubuntu.local> <20081107182918.GA13070@ubuntu.local> <20081120202139.GK17925@lunn.ch> <20081120204734.GA12716@ubuntu.local> <20081120215747.GL17925@lunn.ch> <20081121022731.GA29411@ubuntu.local> <20081123133022.GU17925@lunn.ch>
On Sun, Nov 23, 2008 at 02:30:22PM +0100, Andrew Lunn wrote:
> On Fri, Nov 21, 2008 at 04:27:31AM +0200, Sergei Gavrikov wrote:
> > On Thu, Nov 20, 2008 at 10:57:47PM +0100, Andrew Lunn wrote:
> > > > I will do. One question, Is it normal to have upcase(x) there? in
> > > > dirname? What is a practic?
> > >
> > > Humm, lower case is more normal in directory names. However CDL
> > > properties generally use upper case.
> >
> > Reworked: 3 flash packages became one: CYGPKG_DEVS_FLASH_ARM_OLPCX2294.
> > dirname is lower cased dev/flash/arm/olpcx2294. Andrew, please, remove
> > previous patches. I fix CFLAGS for arm-eabi and did refresh redboot's
> > ecm files. There are redboot_RAM.ecm, redboot_ROM.ecm and minimalist
> > redboot_ROM_minimal.ecm (no flash, eth, just serial) in the 'misc' dir.
> > for the targets. I put all in one patch and new ecos.db.tail as well. Is
> > it okay?
>
> The ports have been committed. Attached are the actual patches.
>
> Please could you spend some time rewriting the LCD driver to use
> HAL_WRITE_UINT?() macros instead of casted volatile pointers.
Andrew
I clean up olpce2294_misc.c LCD code from not-portable I/O macros and
test new code on OLPC-E2294. It's okay. Pease, apply a patch against
CVS.
Thank you,
Sergei
Index: olpce2294/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/lpc2xxx/olpce2294/current/ChangeLog,v
retrieving revision 1.1
diff -U5 -r1.1 ChangeLog
--- olpce2294/current/ChangeLog 23 Nov 2008 13:01:13 -0000 1.1
+++ olpce2294/current/ChangeLog 23 Nov 2008 16:02:22 -0000
@@ -1,5 +1,11 @@
+2008-11-23 Sergei Gavrikov <sergei.gavrikov@gmail.com>
+
+ * include/plf_io.h: Useless and not-portable IO macros removed.
+ * src/olpce2294_misc.c: LCD driver reworked with a use eCos I/O
+ macros.
+
2008-08-31 Sergei Gavrikov <sergei.gavrikov@gmail.com>
* LPC-E2294 development board package
* cdl/hal_arm_lpc2xxx_olpce2294.cdl
* include/hal_platform_setup.h
Index: olpce2294/current/include/plf_io.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/lpc2xxx/olpce2294/current/include/plf_io.h,v
retrieving revision 1.1
diff -U5 -r1.1 plf_io.h
--- olpce2294/current/include/plf_io.h 23 Nov 2008 13:01:14 -0000 1.1
+++ olpce2294/current/include/plf_io.h 23 Nov 2008 16:02:22 -0000
@@ -55,33 +55,10 @@
#ifndef __ASSEMBLER__
extern void hal_plf_hardware_init(void);
#define HAL_PLF_HARDWARE_INIT() \
hal_plf_hardware_init()
-#define IO0PIN (*(volatile unsigned int *)0xE0028000)
-#define IO0SET (*(volatile unsigned int *)0xE0028004)
-#define IO0DIR (*(volatile unsigned int *)0xE0028008)
-#define IO0CLR (*(volatile unsigned int *)0xE002800C)
-
-#define IO1PIN (*(volatile unsigned int *)0xE0028010)
-#define IO1SET (*(volatile unsigned int *)0xE0028014)
-#define IO1DIR (*(volatile unsigned int *)0xE0028018)
-#define IO1CLR (*(volatile unsigned int *)0xE002801C)
-
-#define IO2PIN (*(volatile unsigned int *)0xE0028020)
-#define IO2SET (*(volatile unsigned int *)0xE0028024)
-#define IO2DIR (*(volatile unsigned int *)0xE0028028)
-#define IO2CLR (*(volatile unsigned int *)0xE002802C)
-
-#define IO3PIN (*(volatile unsigned int *)0xE0028030)
-#define IO3SET (*(volatile unsigned int *)0xE0028034)
-#define IO3DIR (*(volatile unsigned int *)0xE0028038)
-#define IO3CLR (*(volatile unsigned int *)0xE002803C)
-
-#define PINSEL0 (*(volatile unsigned int *)0xE002C00)
-#define PINSEL1 (*(volatile unsigned int *)0xE002C04)
-
#endif // __ASSEMBLER__
//-----------------------------------------------------------------------------
// end of plf_io.h
#endif // CYGONCE_HAL_PLF_IO_H
Index: olpce2294/current/src/olpce2294_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/lpc2xxx/olpce2294/current/src/olpce2294_misc.c,v
retrieving revision 1.1
diff -U5 -r1.1 olpce2294_misc.c
--- olpce2294/current/src/olpce2294_misc.c 23 Nov 2008 13:01:14 -0000 1.1
+++ olpce2294/current/src/olpce2294_misc.c 23 Nov 2008 16:02:22 -0000
@@ -194,40 +194,80 @@
CYG_MACRO_END
// Set RS, R/W to read data
#define LCD_RS_READ_DATA() \
CYG_MACRO_START \
- IO0SET |= MPU_RW; \
- IO0SET |= MPU_RS; \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ _t_ |= MPU_RW | MPU_RS; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
CYG_MACRO_END
// Set RS, R/W to read a busy flag and address counter
#define LCD_RS_READ_STAT() \
CYG_MACRO_START \
- IO0SET |= MPU_RW; \
- IO0CLR |= MPU_RS; \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ _t_ |= MPU_RW; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ _t_ |= MPU_RS; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
CYG_MACRO_END
// Set RS, R/W to write data
#define LCD_RS_WRITE_DATA() \
CYG_MACRO_START \
- IO0CLR |= MPU_RW; \
- IO0SET |= MPU_RS; \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ _t_ |= MPU_RW; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ _t_ |= MPU_RS; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
CYG_MACRO_END
// Set RS, R/W to write an instruction
#define LCD_RS_WRITE_CMD() \
CYG_MACRO_START \
- IO0CLR |= MPU_RW; \
- IO0CLR |= MPU_RS; \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ _t_ |= MPU_RW | MPU_RS; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
CYG_MACRO_END
#define LCD_ENABLE_HIGH() \
- IO0SET |= MPU_EN;
+ CYG_MACRO_START \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ _t_ |= MPU_EN; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ CYG_MACRO_END
#define LCD_ENABLE_LOW() \
- IO0CLR |= MPU_EN;
+ CYG_MACRO_START \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ _t_ |= MPU_EN; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ CYG_MACRO_END
// High-level enable pulse
#define LCD_ENABLE_PULSE() \
CYG_MACRO_START \
LCD_ENABLE_HIGH (); \
@@ -237,21 +277,56 @@
CYG_MACRO_END
// Read a nibble of data from LCD controller
#define LCD_READ_NIBBLE( _n_) \
CYG_MACRO_START \
- IO0DIR &= ~MPU_DB; \
- _n_ = (IO0PIN & MPU_DB) >> 4; \
- _n_ &= 15; \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \
+ _t_ &= ~MPU_DB; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0PIN, _t_); \
+ _n_ = (_t_ & MPU_DB) >> 4; _n_ &= 0x0f; \
CYG_MACRO_END
// Write a nibble of data to LCD controller
#define LCD_WRITE_NIBBLE( _n_) \
CYG_MACRO_START \
- IO0DIR |= MPU_DB; \
- IO0CLR |= MPU_DB; \
- IO0SET |= ((_n_) & 15) << 4; \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \
+ _t_ |= MPU_DB; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ _t_ |= MPU_DB; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ _t_ |= ((_n_) & 0x0f) << 4; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \
+ CYG_MACRO_END
+
+// Drop LCD on POTS
+#define LCD_DROP_ON_POTS( _n_) \
+ CYG_MACRO_START \
+ cyg_uint32 _t_; \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \
+ _t_ |= MPU_XX; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \
+ HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
+ _t_ |= MPU_XX; \
+ HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \
+ CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \
CYG_MACRO_END
//--------------------------------------------------------------------------
// _lcd_read --
//
@@ -326,12 +401,11 @@
static void
_lcd_pots_init (void)
{
// around power on
- IO0DIR |= MPU_XX;
- IO0CLR |= MPU_XX;
+ LCD_DROP_ON_POTS ();
// wait for more than 30 ms after Vdd rises to 4.5 V
LCD_DELAY_US (32000);
// at first, point on a using of 4-bit mode
- References:
- Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
- Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
- Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
- Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
- Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
- Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets
- Re: Support for Olimex LPC-H2294, LPC-E2294, LPC-L2294-1M targets