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STM32 - Allow initialisation of SRAM area from ROM.
- From: Chris Holgate <chris at zynaptic dot com>
- To: ecos-patches at sourceware dot org
- Date: Sat, 07 Feb 2009 12:39:17 +0000
- Subject: STM32 - Allow initialisation of SRAM area from ROM.
This patch adds support for SRAM initialisation from ROM in STM32 ROM
based builds. It allows declarations such as the following to correctly
allocate and initialise variables in the SRAM area.
static cyg_uint16 dma_tx_null __attribute__((section (".sram"))) = 0xFFFF;
Please could someone who is a linker script expert check my changes to
src/cortexm.ld, since linker scripts are not my forte!
Chris.
diff -u5 -r cvs-06.02.09/ecos/packages//hal/cortexm/arch/current/ChangeLog working-06.02.09/ecos/packages//hal/cortexm/arch/current/ChangeLog
--- cvs-06.02.09/ecos/packages//hal/cortexm/arch/current/ChangeLog 2009-01-29 17:49:15.000000000 +0000
+++ working-06.02.09/ecos/packages//hal/cortexm/arch/current/ChangeLog 2009-02-07 12:22:34.000000000 +0000
@@ -1,5 +1,11 @@
+2009-02-07 Chris Holgate <chris@zynaptic.com>
+
+ * src/hal_misc.c:
+ * src/cortexm.ld:
+ Modified SRAM linker section to support initialisation from ROM.
+
2008-12-03 Nick Garnett <nickg@ecoscentric.com>
* src/hal_misc.c (hal_deliver_interrupt): Fix instrumentation call
to allow it to compile properly.
diff -u5 -r cvs-06.02.09/ecos/packages//hal/cortexm/arch/current/src/cortexm.ld working-06.02.09/ecos/packages//hal/cortexm/arch/current/src/cortexm.ld
--- cvs-06.02.09/ecos/packages//hal/cortexm/arch/current/src/cortexm.ld 2009-01-29 17:49:15.000000000 +0000
+++ working-06.02.09/ecos/packages//hal/cortexm/arch/current/src/cortexm.ld 2009-02-06 20:18:07.000000000 +0000
@@ -233,12 +233,16 @@
{ FORCE_OUTPUT; *(.mmu_tables) } \
> _region_
#define SECTION_sram(_region_, _vma_, _lma_) \
.sram _vma_ : _lma_ \
- { FORCE_OUTPUT; *(.sram*) } \
- > _region_
+ { __sram_data_start = ABSOLUTE (.); \
+ *(.sram*) . = ALIGN (4); } \
+ > _region_ \
+ __srom_data_start = LOADADDR (.sram); \
+ __sram_data_end = .; PROVIDE (__sram_data_end = .); \
+ PROVIDE (__srom_data_end = LOADADDR (.sram) + SIZEOF(.sram));
#define SECTION_data(_region_, _vma_, _lma_) \
.data _vma_ : _lma_ \
{ __ram_data_start = ABSOLUTE (.); \
*(.data*) *(.data1) *(.gnu.linkonce.d.*) \
diff -u5 -r cvs-06.02.09/ecos/packages//hal/cortexm/arch/current/src/hal_misc.c working-06.02.09/ecos/packages//hal/cortexm/arch/current/src/hal_misc.c
--- cvs-06.02.09/ecos/packages//hal/cortexm/arch/current/src/hal_misc.c 2009-01-29 17:49:15.000000000 +0000
+++ working-06.02.09/ecos/packages//hal/cortexm/arch/current/src/hal_misc.c 2009-02-06 20:33:11.000000000 +0000
@@ -95,10 +95,13 @@
// DATA and BSS locations
__externC cyg_uint32 __ram_data_start;
__externC cyg_uint32 __ram_data_end;
__externC cyg_uint32 __rom_data_start;
+__externC cyg_uint32 __sram_data_start;
+__externC cyg_uint32 __sram_data_end;
+__externC cyg_uint32 __srom_data_start;
__externC cyg_uint32 __bss_start;
__externC cyg_uint32 __bss_end;
// Scheduler lock
__externC volatile cyg_uint32 cyg_scheduler_sched_lock;
@@ -195,10 +198,19 @@
for( p = &__ram_data_start, q = &__rom_data_start;
p < &__ram_data_end;
p++, q++ )
*p = *q;
}
+
+ // Relocate data from ROM to SRAM
+ {
+ register cyg_uint32 *p, *q;
+ for( p = &__sram_data_start, q = &__srom_data_start;
+ p < &__sram_data_end;
+ p++, q++ )
+ *p = *q;
+ }
#endif
// Clear BSS
{
register cyg_uint32 *p;
diff -u5 -r cvs-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/ChangeLog working-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/ChangeLog
--- cvs-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/ChangeLog 2009-02-02 14:13:43.000000000 +0000
+++ working-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/ChangeLog 2009-02-07 12:19:50.000000000 +0000
@@ -1,5 +1,10 @@
+2009-02-07 Chris Holgate <chris@zynaptic.com>
+
+ * include/pkgconf/mlt_cortexm_stm3210e_eval_rom.ldi:
+ Modified SRAM section so that initialisation data is placed in ROM.
+
2009-01-31 Bart Veer <bartv@ecoscentric.com>
* cdl/hal_cortexm_stm32_stm3210e_eval.cdl: update compiler flags for gcc 4.x
2008-12-10 Nick Garnett <nickg@ecoscentric.com>
diff -u5 -r cvs-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/include/pkgconf/mlt_cortexm_stm3210e_eval_rom.ldi working-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/include/pkgconf/mlt_cortexm_stm3210e_eval_rom.ldi
--- cvs-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/include/pkgconf/mlt_cortexm_stm3210e_eval_rom.ldi 2009-02-04 11:37:42.000000000 +0000
+++ working-06.02.09/ecos/packages//hal/cortexm/stm32/stm3210e_eval/current/include/pkgconf/mlt_cortexm_stm3210e_eval_rom.ldi 2009-02-06 20:08:37.000000000 +0000
@@ -22,12 +22,12 @@
SECTION_rodata1 (flash, ALIGN (0x8), LMA_EQ_VMA)
SECTION_fixup (flash, ALIGN (0x8), LMA_EQ_VMA)
SECTION_gcc_except_table (flash, ALIGN (0x8), LMA_EQ_VMA)
SECTION_eh_frame (flash, ALIGN (0x8), LMA_EQ_VMA)
SECTION_got (flash, ALIGN (0x8), LMA_EQ_VMA)
- SECTION_sram (sram, 0x20000400, LMA_EQ_VMA)
- SECTION_data (ram, 0x68000000, FOLLOWING (.got))
+ SECTION_sram (sram, 0x20000400, FOLLOWING (.got))
+ SECTION_data (ram, 0x68000000, FOLLOWING (.sram))
SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}