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Re: ARM architecture HAL fix
Jim Seymour <firstname.lastname@example.org> writes:
> Nick Garnett wrote:
> > This fixes a very old bug in the ARM architecture HAL.
> > [... replace "bls" with "blt" in bss zero loop ...]
> Won't this fail if the memory is located above 0x80000000?
> I don't know how common this is, but I'm sure there's an
> implementation out there *somewhere*...
You're right! That's what comes of trying a quick fix, I forgot that
LT was a signed comparison. The following should fix it properly.
RCS file: /cvs/ecos/ecos/packages/hal/arm/arch/current/ChangeLog,v
retrieving revision 1.115
diff -u -5 -r1.115 ChangeLog
--- ChangeLog 9 Feb 2009 15:34:49 -0000 1.115
+++ ChangeLog 9 Feb 2009 16:42:36 -0000
@@ -3,12 +3,12 @@
* src/vectors.S (start): The loop to initialize BSS was using a
BLS to terminate. This caused an extra zero to be stored beyond
the end of __bss_end. Usually this is benign, but when __bss_end
is at the very top of RAM, and the hardware generates an exception
for illegal accesses, this can crash the program before it even
- starts. The fix is to use a BLT instructions which will terminate
- the loop 1 word earlier.
+ starts. The fix is to use a BHI instructions and reverse the
+ compare, which will terminate the loop 1 word earlier.
2009-02-02 Bart Veer <email@example.com>
* cdl/hal_arm.cdl: add new architectural CFLAGS and LDFLAGS
RCS file: /cvs/ecos/ecos/packages/hal/arm/arch/current/src/vectors.S,v
retrieving revision 1.60
diff -u -5 -r1.60 vectors.S
--- src/vectors.S 9 Feb 2009 15:34:49 -0000 1.60
+++ src/vectors.S 9 Feb 2009 16:42:36 -0000
@@ -447,12 +447,12 @@
1: str r0,[r1],#4
- cmp r1,r2
- blt 1b
+ cmp r2,r1
+ bhi 1b
// Run kernel + application in THUMB mode
Nick Garnett eCos Kernel Architect
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