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cortexm system control register definitions
- From: Simon Kallweit <simon dot kallweit at intefo dot ch>
- To: eCos Patches List <ecos-patches at ecos dot sourceware dot org>
- Date: Fri, 27 Feb 2009 11:56:59 +0100
- Subject: cortexm system control register definitions
really small patch to add system control register definitions (used for
sleep mode)
this time with the patch attached, sorry about the previous mail!
diff --git a/packages/hal/cortexm/arch/current/ChangeLog b/packages/hal/cortexm/arch/current/ChangeLog
index b3f1968..d11862d 100644
--- a/packages/hal/cortexm/arch/current/ChangeLog
+++ b/packages/hal/cortexm/arch/current/ChangeLog
@@ -1,3 +1,7 @@
+2009-02-27 Simon Kallweit <simon.kallweit@intefo.ch>
+
+ * include/hal_io.h: Added system control register definitions
+
2009-02-13 Nick Garnett <nickg@ecoscentric.com>
* include/hal_arch.h: Add include for var_arch.h.
diff --git a/packages/hal/cortexm/arch/current/include/hal_io.h b/packages/hal/cortexm/arch/current/include/hal_io.h
index 559b99e..02259f1 100644
--- a/packages/hal/cortexm/arch/current/include/hal_io.h
+++ b/packages/hal/cortexm/arch/current/include/hal_io.h
@@ -190,6 +190,12 @@
#define CYGARC_REG_NVIC_AIRCR_VECTCLRACTIVE BIT_(1)
#define CYGARC_REG_NVIC_AIRCR_VECTRESET BIT_(0)
+// SCR
+
+#define CYGARC_REG_NVIC_SCR_SLEEPONEXIT BIT_(1)
+#define CYGARC_REG_NVIC_SCR_DEEPSLEEP BIT_(2)
+#define CYGARC_REG_NVIC_SCR_SEVONPEND BIT_(4)
+
// SHCSR
#define CYGARC_REG_NVIC_SHCSR_USGFAULTENA BIT_(18)