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bsp for Olimex LPC-L2294-8M


Hello,

Following is a patch to support the OLIMEX LPC-L2294-8M development board: same as LPC-L2294-1M with 8Mbytes of RAM (2 x SAMSUNG K1S321611C) and 4M of FLASH (INTEL TE28F320C3BD70).
I don't have a LPC-L2294-1M, so I'm not sure if it has broken something.
Be aware that this is my 1st contact with eCos, maybe there's a better way to do this.



diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog
--- ecos-current/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog 2010-11-05 10:58:37.000000000 +0100
+++ ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog 2010-11-05 11:07:05.000000000 +0100
@@ -1,4 +1,8 @@
+2010-11-03 JF Argentino <jf.argentino@osean.fr>
+
+ * Adding support for LPC-L2294-8M board
+
2008-11-22 Sergei Gavrikov <sergei.gavrikov@gmail.com>


* Flash driver v2 for LPC-E2294, LPC-H2294, LPC-L2294-1M boards
* cdl/flash_olpcx2294.cdl, src/arm_olpcx2294_flash.c: New files.
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c
--- ecos-current/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c 2010-11-05 10:58:37.000000000 +0100
+++ ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c 2010-11-05 10:58:30.000000000 +0100
@@ -62,11 +62,12 @@
#include <cyg/io/flash.h>
#include <cyg/io/strata_dev.h>


// Olimex LPC-E2294 development board and Olimex LPC-H2294 header board both
// have 28F320C3-B flash memory part, Olimex LPC-L2294-1M development board has
-// 28F160C3-B flash memory part. All boards have 16-bit access to it's flash
+// 28F160C3-B flash memory part and Olimex LPC-L2294-8M development board has
+// 28F320C3-B flash memory part. All boards have 16-bit access to it's flash
// devices.
static const CYG_FLASH_FUNS(hal_olpcx2294_flash_strata_funs,
&cyg_strata_init_check_devid_16,
&cyg_flash_devfn_query_nop,
&cyg_strata_erase_16,
@@ -75,18 +76,20 @@
&cyg_strata_lock_k3_16,
&cyg_strata_unlock_k3_16);


 static const cyg_strata_dev hal_olpcx2294_flash_priv = {
     .manufacturer_code = CYG_FLASH_STRATA_MANUFACTURER_INTEL,
-#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294
+#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 \
+        && CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE != 0x00100000
     .device_code = 0x88c3, /* 16-Mbit x 16-B, 28F160C3-B */
 #else
     .device_code = 0x88c5, /* 32-Mbit x 16-B, 28F320C3-B */
 #endif
     .bufsize    = 1,
     .block_info = {
-#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294
+#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 \
+        && CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE != 0x00100000
         { 0x00002000,  8 },/* boot bottom 8 x 8K blocks */
         { 0x00010000, 31 } /* 31 x 64K blocks */
 #else
         { 0x00002000,  8 },/* boot bottom 8 x 8K blocks */
         { 0x00010000, 63 } /* 63 x 64K blocks */
@@ -96,11 +99,12 @@

CYG_FLASH_DRIVER(hal_olpcx2294_flash,
&hal_olpcx2294_flash_strata_funs,
0,
0x80000000,
-#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294
+#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 \
+ && CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE != 0x00100000
0x801fffff,
#else
0x803fffff,
#endif
2,
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl 2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl 2010-11-05 10:58:31.000000000 +0100
@@ -1,11 +1,11 @@
# ====================================================================
#
# hal_arm_lpc2xxx_olpcl2294.cdl
#
# ARM LPC2XXX OLPCL2294 development board package configuration
-# data
+# data, for both 1MB and 8MB of external RAM
#
# ====================================================================
## ####ECOSGPLCOPYRIGHTBEGIN####


## -------------------------------------------

## This file is part of eCos, the Embedded Configurable Operating System.
@@ -47,18 +47,18 @@
#####DESCRIPTIONEND####
#
# ====================================================================


 cdl_package CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 {
-    display       "Olimex LPC-L2294-1MB development board HAL"
+    display       "Olimex LPC-L2294 development board HAL"
     parent        CYGPKG_HAL_ARM_LPC2XXX
     define_header hal_arm_lpc2xxx_olpcl2294.h
     include_dir   cyg/hal
     hardware
     description   "
         The OLPCL2294 HAL package provides the support needed to run
-        eCos on Olimex LPC-L2294-1MB development board."
+        eCos on Olimex LPC-L2294-1MB or LPC-L2294-8MB development board."

compile olpcl2294_misc.c

requires { CYGHWR_HAL_ARM_LPC2XXX == "LPC2294" }

@@ -68,10 +68,17 @@
puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_lpc2xxx_olpcl2294.h>"
puts $::cdl_header "#define HAL_PLATFORM_CPU \"ARM7TDMI-S\""
puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Olimex LPC-L2294 development board\""
puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\""
}
+
+ cdl_component CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE {
+ display "external RAM size, involve the FLASH size too"
+ flavor data
+ default_value 0x00100000
+ legal_values {0x00100000 0x00800000}
+ }


cdl_component CYG_HAL_STARTUP {
display "Startup type"
flavor data
default_value {"RAM"}
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog 2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog 2010-11-05 10:58:31.000000000 +0100
@@ -1,5 +1,9 @@
+2010-11-03 JF Argentino <jf.argentino@osean.fr>
+
+ * Adding support for LPC-L2294-8M board
+
2009-02-02 Sergei Gavrikov <sergei.gavrikov@gmail.com>


* cdl/hal_arm_lpc2xxx_olpcl2294.cdl: Expanded a list the legal baud
rates for both diagnostic and debug channels (upon 230400b bps).
* include/hal_platform_setup.h, include/plf_io.h: Extra tabs expanded.
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h 2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h 2010-11-05 12:12:18.000000000 +0100
@@ -136,30 +136,41 @@
// choice of the memory chip(s) will require an adequate setup of RBLE
// bit in BCFG register, too. RBLE = 0 in case of 8-bit based external
// memories, while memory chips capable of accepting 16 or 32 bit wide
// data will work with RBLE = 1.
//
- // BANK0: 2M FLASH
- // TE28F160C3BD70 (1024Kx16 x 1, 70nS)
+ // BANK0: FLASH memory
+ // -TE28F160C3BD70 (1024Kx16 x 1 = 2MB, 70nS) for 1MB RAM version
+ // -TE28F320C3BD70 (2048Kx16 x 1 = 4MB, 70ns) for 8MB RAM version
ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG0
ldr r1,= (0x3 << 0) /* IDCY=3, idle timing */\
| (0x4 << 5) /* WST1=4, read timing */\
| (0x1 << 10) /* RBLE=1 */\
| (0x6 << 11) /* WST2=6, write timing */\
| (0x1 << 28) /* MW=1, 16-bits */
str r1,[r0]


- // BANK1: 1M RAM
- // K6R4016V1D (512Kx16 x 2, 10nS)
- ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG1
+ // BANK1: external RAM
// Warning: changed these timings, you can fall dramatically the eCos
// kernel performance. Check it then using the eCos 'tm_basic' test.
+ // TODO A way to make the timing value dependent of CCLK
+ ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG1
+#if CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE == 0x00100000
+ // 1MB version uses K6R4016V1D (512Kx16 x 2, 10nS)
ldr r1,= (0x0 << 0) /* IDCY=0, idle cycles */\
| (0x0 << 5) /* WST1=0, read timing */\
| (0x1 << 10) /* RBLE=1 */\
| (0x0 << 11) /* WST2=0, write timing */\
| (0x2 << 28) /* MW=2, 32-bits */
+#else
+ // 8MB version uses a K1S321611C (2048Kx16 x 2, 70ns)
+ ldr r1,= (0x3 << 0) /* IDCY=3, idle cycles TODO */\
+ | (0x4 << 5) /* WST1=4, read timing */\
+ | (0x1 << 10) /* RBLE=1 */\
+ | (0x4 << 11) /* WST2=4, write timing */\
+ | (0x2 << 28) /* MW=2, 32-bits */
+#endif
str r1,[r0]


// BANK2: Ethernet
// CS8900A (16-bit, an interrupt driven mode)
ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG2
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h 2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h 2010-11-05 10:58:31.000000000 +0100
@@ -1,19 +1,18 @@
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
-
#endif


#define CYGMEM_REGION_ram (0x81000000)
-#define CYGMEM_REGION_ram_SIZE (0x00100000)
+#define CYGMEM_REGION_ram_SIZE (CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)


 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];

#endif

#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))

-#define CYGMEM_SECTION_heap1_SIZE (0x81100000 - (size_t) CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - (size_t) CYG_LABEL_NAME (__heap1))


diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi 2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi 2010-11-05 10:58:31.000000000 +0100
@@ -1,11 +1,11 @@
#include <cyg/infra/cyg_type.inc>


MEMORY
{
ram0 : ORIGIN = 0x40000000, LENGTH = 0x4000
- ram : ORIGIN = 0x81000000, LENGTH = 0x100000
+ ram : ORIGIN = 0x81000000, LENGTH = CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE
}


SECTIONS
{
SECTIONS_BEGIN
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h 2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h 2010-11-05 10:58:31.000000000 +0100
@@ -1,22 +1,21 @@
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
-
#endif


#define CYGMEM_REGION_rom (0x00000000)
#define CYGMEM_REGION_rom_SIZE (0x00040000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#define CYGMEM_REGION_ram (0x81000000)
-#define CYGMEM_REGION_ram_SIZE (0x00100000)
+#define CYGMEM_REGION_ram_SIZE (CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)


 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];

#endif

#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))

-#define CYGMEM_SECTION_heap1_SIZE (0x81100000 - (size_t) CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - (size_t) CYG_LABEL_NAME (__heap1))


diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi 2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi 2010-11-05 10:58:31.000000000 +0100
@@ -1,11 +1,11 @@
#include <cyg/infra/cyg_type.inc>


MEMORY
{
ram0 : ORIGIN = 0x40000000, LENGTH = 0x4000
- ram : ORIGIN = 0x81000000, LENGTH = 0x100000
+ ram : ORIGIN = 0x81000000, LENGTH = CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE
rom : ORIGIN = 0x00000000, LENGTH = 0x40000
}


 SECTIONS
 {



--
Jean-François Argentino

OSEAN S.A.S
1024 Chemin des Plantades
83130 LA GARDE
FRANCE

Tél.: +33 (0)4 94 03 65 84
Fax : +33 (0)4 94 66 62 32
Web: www.osean.fr
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog
--- ecos-current/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog	2010-11-05 10:58:37.000000000 +0100
+++ ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/ChangeLog	2010-11-05 11:07:05.000000000 +0100
@@ -1,4 +1,8 @@
+2010-11-03 JF Argentino <jf.argentino@osean.fr>
+
+	* Adding support for LPC-L2294-8M board
+
 2008-11-22  Sergei Gavrikov <sergei.gavrikov@gmail.com>
 
 	* Flash driver v2 for LPC-E2294, LPC-H2294, LPC-L2294-1M boards
 	* cdl/flash_olpcx2294.cdl, src/arm_olpcx2294_flash.c: New files.
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c
--- ecos-current/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c	2010-11-05 10:58:37.000000000 +0100
+++ ecos-jfa/packages/devs/flash/arm/olpcx2294v2/current/src/arm_olpcx2294_flash.c	2010-11-05 10:58:30.000000000 +0100
@@ -62,11 +62,12 @@
 #include <cyg/io/flash.h>
 #include <cyg/io/strata_dev.h>
 
 // Olimex LPC-E2294 development board and Olimex LPC-H2294 header board both
 // have 28F320C3-B flash memory part, Olimex LPC-L2294-1M development board has
-// 28F160C3-B flash memory part. All boards have 16-bit access to it's flash
+// 28F160C3-B flash memory part and Olimex LPC-L2294-8M development board has
+// 28F320C3-B flash memory part. All boards have 16-bit access to it's flash
 // devices.
 static const CYG_FLASH_FUNS(hal_olpcx2294_flash_strata_funs,
     &cyg_strata_init_check_devid_16,
     &cyg_flash_devfn_query_nop,
     &cyg_strata_erase_16,
@@ -75,18 +76,20 @@
     &cyg_strata_lock_k3_16,
     &cyg_strata_unlock_k3_16);
 
 static const cyg_strata_dev hal_olpcx2294_flash_priv = {
     .manufacturer_code = CYG_FLASH_STRATA_MANUFACTURER_INTEL,
-#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 
+#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 \
+        && CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE != 0x00100000
     .device_code = 0x88c3, /* 16-Mbit x 16-B, 28F160C3-B */
 #else
     .device_code = 0x88c5, /* 32-Mbit x 16-B, 28F320C3-B */
 #endif
     .bufsize    = 1,
     .block_info = {
-#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 
+#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 \
+        && CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE != 0x00100000
         { 0x00002000,  8 },/* boot bottom 8 x 8K blocks */
         { 0x00010000, 31 } /* 31 x 64K blocks */
 #else
         { 0x00002000,  8 },/* boot bottom 8 x 8K blocks */
         { 0x00010000, 63 } /* 63 x 64K blocks */
@@ -96,11 +99,12 @@
 
 CYG_FLASH_DRIVER(hal_olpcx2294_flash,
                  &hal_olpcx2294_flash_strata_funs,
                  0,
                  0x80000000,
-#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 
+#ifdef CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 \
+        && CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE != 0x00100000
                  0x801fffff,
 #else
                  0x803fffff,
 #endif
                  2,
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl	2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/cdl/hal_arm_lpc2xxx_olpcl2294.cdl	2010-11-05 10:58:31.000000000 +0100
@@ -1,11 +1,11 @@
 # ====================================================================
 #
 #      hal_arm_lpc2xxx_olpcl2294.cdl
 #
 #      ARM LPC2XXX OLPCL2294 development board package configuration
-#      data
+#      data, for both 1MB and 8MB of external RAM
 #
 # ====================================================================
 ## ####ECOSGPLCOPYRIGHTBEGIN####                                            
 ## -------------------------------------------                              
 ## This file is part of eCos, the Embedded Configurable Operating System.   
@@ -47,18 +47,18 @@
 #####DESCRIPTIONEND####
 #
 # ====================================================================
 
 cdl_package CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294 {
-    display       "Olimex LPC-L2294-1MB development board HAL"
+    display       "Olimex LPC-L2294 development board HAL"
     parent        CYGPKG_HAL_ARM_LPC2XXX
     define_header hal_arm_lpc2xxx_olpcl2294.h
     include_dir   cyg/hal
     hardware
     description   "
         The OLPCL2294 HAL package provides the support needed to run
-        eCos on Olimex LPC-L2294-1MB development board."
+        eCos on Olimex LPC-L2294-1MB or LPC-L2294-8MB development board."
 
     compile       olpcl2294_misc.c
 
     requires      { CYGHWR_HAL_ARM_LPC2XXX == "LPC2294" }
 
@@ -68,10 +68,17 @@
         puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_lpc2xxx_olpcl2294.h>"
         puts $::cdl_header "#define HAL_PLATFORM_CPU    \"ARM7TDMI-S\""
         puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"Olimex LPC-L2294 development board\""
         puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
     }
+    
+    cdl_component CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE {
+        display       "external RAM size, involve the FLASH size too"
+        flavor        data
+        default_value 0x00100000
+        legal_values  {0x00100000 0x00800000}
+    }
 
     cdl_component CYG_HAL_STARTUP {
         display       "Startup type"
         flavor        data
         default_value {"RAM"}
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog	2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/ChangeLog	2010-11-05 10:58:31.000000000 +0100
@@ -1,5 +1,9 @@
+2010-11-03 JF Argentino <jf.argentino@osean.fr>
+
+	* Adding support for LPC-L2294-8M board
+
 2009-02-02  Sergei Gavrikov <sergei.gavrikov@gmail.com>
 
 	* cdl/hal_arm_lpc2xxx_olpcl2294.cdl: Expanded a list the legal baud
 	rates for both diagnostic and debug channels (upon 230400b bps).
 	* include/hal_platform_setup.h, include/plf_io.h: Extra tabs expanded.
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h	2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/hal_platform_setup.h	2010-11-05 12:12:18.000000000 +0100
@@ -136,30 +136,41 @@
         // choice of the memory chip(s) will require an adequate setup of RBLE
         // bit in BCFG register, too. RBLE = 0 in case of 8-bit based external
         // memories, while memory chips capable of accepting 16 or 32 bit wide
         // data will work with RBLE = 1.
         //
-        // BANK0: 2M FLASH
-        // TE28F160C3BD70 (1024Kx16 x 1, 70nS)
+        // BANK0: FLASH memory
+        //     -TE28F160C3BD70 (1024Kx16 x 1 = 2MB, 70nS) for 1MB RAM version
+        //     -TE28F320C3BD70 (2048Kx16 x 1 = 4MB, 70ns) for 8MB RAM version
         ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG0
         ldr r1,=  (0x3 << 0)    /* IDCY=3, idle timing  */\
                 | (0x4 << 5)    /* WST1=4, read timing  */\
                 | (0x1 << 10)   /* RBLE=1               */\
                 | (0x6 << 11)   /* WST2=6, write timing */\
                 | (0x1 << 28)   /* MW=1,   16-bits      */
         str r1,[r0]
 
-        // BANK1: 1M RAM
-        // K6R4016V1D (512Kx16 x 2, 10nS)
-        ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG1
+        // BANK1: external RAM
         // Warning: changed these timings, you can fall dramatically the eCos
         // kernel performance. Check it then using the eCos 'tm_basic' test.
+        // TODO A way to make the timing value dependent of CCLK
+        ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG1
+#if CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE == 0x00100000
+        // 1MB version uses K6R4016V1D (512Kx16 x 2, 10nS)
         ldr r1,=  (0x0 << 0)    /* IDCY=0, idle cycles  */\
                 | (0x0 << 5)    /* WST1=0, read timing  */\
                 | (0x1 << 10)   /* RBLE=1               */\
                 | (0x0 << 11)   /* WST2=0, write timing */\
                 | (0x2 << 28)   /* MW=2,   32-bits      */
+#else
+        // 8MB version uses a K1S321611C (2048Kx16 x 2, 70ns)
+        ldr r1,=  (0x3 << 0)    /* IDCY=3, idle cycles TODO */\
+                | (0x4 << 5)    /* WST1=4, read timing  */\
+                | (0x1 << 10)   /* RBLE=1               */\
+                | (0x4 << 11)   /* WST2=4, write timing */\
+                | (0x2 << 28)   /* MW=2,   32-bits      */
+#endif
         str r1,[r0]
 
         // BANK2: Ethernet
         // CS8900A (16-bit, an interrupt driven mode)
         ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG2
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h	2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.h	2010-11-05 10:58:31.000000000 +0100
@@ -1,19 +1,18 @@
 #ifndef __ASSEMBLER__
 #include <cyg/infra/cyg_type.h>
 #include <stddef.h>
-
 #endif
 
 #define CYGMEM_REGION_ram (0x81000000)
-#define CYGMEM_REGION_ram_SIZE (0x00100000)
+#define CYGMEM_REGION_ram_SIZE (CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE)
 #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
 
 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];
 
 #endif
 
 #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
 
-#define CYGMEM_SECTION_heap1_SIZE (0x81100000 - (size_t) CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - (size_t) CYG_LABEL_NAME (__heap1))
 
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi	2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_ram.ldi	2010-11-05 10:58:31.000000000 +0100
@@ -1,11 +1,11 @@
 #include <cyg/infra/cyg_type.inc>
 
 MEMORY
 {
     ram0 : ORIGIN = 0x40000000, LENGTH = 0x4000
-    ram  : ORIGIN = 0x81000000, LENGTH = 0x100000
+    ram  : ORIGIN = 0x81000000, LENGTH = CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE
 }
 
 SECTIONS
 {
     SECTIONS_BEGIN
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h	2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.h	2010-11-05 10:58:31.000000000 +0100
@@ -1,22 +1,21 @@
 #ifndef __ASSEMBLER__
 #include <cyg/infra/cyg_type.h>
 #include <stddef.h>
-
 #endif
 
 #define CYGMEM_REGION_rom (0x00000000)
 #define CYGMEM_REGION_rom_SIZE (0x00040000)
 #define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
 #define CYGMEM_REGION_ram (0x81000000)
-#define CYGMEM_REGION_ram_SIZE (0x00100000)
+#define CYGMEM_REGION_ram_SIZE (CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE)
 #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
 
 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];
 
 #endif
 
 #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
 
-#define CYGMEM_SECTION_heap1_SIZE (0x81100000 - (size_t) CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - (size_t) CYG_LABEL_NAME (__heap1))
 
diff -r -U 5 -N -x CVS -x .svn -x '*~' -x '*.swp' ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi
--- ecos-current/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi	2010-11-05 10:58:40.000000000 +0100
+++ ecos-jfa/packages/hal/arm/lpc2xxx/olpcl2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpcl2294_rom.ldi	2010-11-05 10:58:31.000000000 +0100
@@ -1,11 +1,11 @@
 #include <cyg/infra/cyg_type.inc>
 
 MEMORY
 {
     ram0   : ORIGIN = 0x40000000, LENGTH = 0x4000
-    ram    : ORIGIN = 0x81000000, LENGTH = 0x100000
+    ram    : ORIGIN = 0x81000000, LENGTH = CYGPKG_HAL_ARM_LPC2XXX_OLPCL2294_RAMSIZE
     rom    : ORIGIN = 0x00000000, LENGTH = 0x40000
 }
 
 SECTIONS
 {

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