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[Bug 1001114] New port: NXP LPC17XX Variant, Olimex LPC-1766-STK platform

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--- Comment #27 from Ilija Kocho <> 2011-03-05 12:33:47 GMT ---
Created an attachment (id=1162)
 --> (
Fixed RedBooot memory region list. Incremental patch.

(In reply to comment #26)
> Created an attachment (id=1156)
 --> ( [details]
> add needed CACHE macros to hal_cache.h

Thanks for the patch. Now here I submit correction of my bugs. This patch is


1) Now is tested with RedBoot too. Previously had forgotten to synchronize
memory region list for RedBoot after i renamed memory regions. 
Question: How much useful is RedBoot on these particular chips.

2) Other changes are a monkey work, I tried to follow you in inactivation of
non implemented stuff. I also re-introduce comments on enabled IO port pins, I
hope now they are more descriptive:
  // Enable pins: TXD1. .. .. .. .. .. RXD0-TXD0 ..
  // Enable pins: .. .. .. .. .RTS1 .DTR1 DSR1-DCD1 CTS1-RXD1
where dots (.) stand for non-enabled pins while names represent selected pin
functionality. Dot's/names are in pairs according to LPC PINSEL register
Anyway if you think they're not good enough you can remove them.

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