[Bug 1001275] Cortex-M (armV7) architecture endian instructions / Applied on lwIP

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--- Comment #10 from Sergei Gavrikov <sergei.gavrikov@gmail.com> 2011-08-22 14:01:20 BST ---
(In reply to comment #9)
Ilija, to synchronize our heads :-) I did mean/understand what

on the arch's side we plan to add two new header files:

  - cortextm_regs.h     // CYGARC_REV16(), CYGARC_REV32(), etc.
  - cortexm_endian.h    // CYGARC_SWAP16(), CYGARC_SWAP32(), and
                        // by cond. CYG_SWAP16(), CYG_SWAP32()
and patch one

  - hal_cortexm.cdl     // 1) define_proc ... CYGBLD_HAL_ENDIAN_H
                        // 2) CYGBLD_HAL_CORTEXM_FAST_SWAPXX_INST
                        // NOTE: it is a draft name (to discuss)

on the lwip's side to patch

  - lwip_net.cdl        // CYGBLD_LWIP_HTOS_HTONL_INLINED
  - lwipopts.h          // check above and set if needed
                        // LWIP_PLATFORM_BYTESWAP, etc.

Sergei

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