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[Bug 1001187] New port - HAL: Freescale Kinetis variant, TWR-K60N512, TWR-K40X256 plf; Devs: Freescale UART and ENET (Ethernet)
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: ecos-patches at ecos dot sourceware dot org
- Date: Tue, 18 Oct 2011 00:28:27 +0100
- Subject: [Bug 1001187] New port - HAL: Freescale Kinetis variant, TWR-K60N512, TWR-K40X256 plf; Devs: Freescale UART and ENET (Ethernet)
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- References: <bug-1001187-104@http.bugs.ecos.sourceware.org/>
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--- Comment #24 from Jonathan Larmour <jifl@ecoscentric.com> 2011-10-18 00:28:22 BST ---
(In reply to comment #22)
> (In reply to comment #20)
> > As per direct mail, here's a few comments, although I haven't done what I'd
> > call a full review:
> >
> >
> > - I'll just mention that if extra TTYs are justified, then you should just
> > modify CYGPKG_IO_SERIAL.
>
>
> This has some history. The idea was a provision for adding (as much as needed)
> additional tty/termios drivers into target without the need for changing IO.
> Luckily after a long session with Sergei the patch was surprisingly short.
> Please see: http://ecos.sourceware.org/ml/ecos-devel/2011-03/msg00023.html
> Also: Bug #1001180
Personally I would take a pragmatic approach and just increase the number of
devices to 6. However using a 'for' loop in the CDL, would be a good
rationalisation.
> > - The CYGPKG_HAL_CORTEXM_KINETIS .cdl file is quite big - perhaps the
> > components related to clocking could be split off into a separate file, and
> > included.
>
>
> Yeah. This clock is more complex than some 8-bit micro-controllers. Good idea.
> This brings me an idea of extracting clocking code from kinetis_misc.c?
>
> kinetis_clocking.cdl
> kinetis_clocking.c
>
> Any comment?
That would probably be good too. It makes it more maintainable to have all the
clock things in one place, and for files not to get too large.
Thanks for all the other responses.
Jifl
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