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[Bug 1001814] Kinetis clock gating
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: ecos-patches at ecos dot sourceware dot org
- Date: Sat, 06 Apr 2013 16:34:25 +0000
- Subject: [Bug 1001814] Kinetis clock gating
- Auto-submitted: auto-generated
- References: <bug-1001814-104 at http dot bugs dot ecos dot sourceware dot org/>
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--- Comment #16 from Ilija Kocho <firstname.lastname@example.org> ---
(In reply to comment #15)
> I updated CVS. Reapplied my patches for FXM, MMC, SPI, I2C, GPIO, and LWIP.
> Diffed the result against my working packages tree to make sure all the
> patches match. DID NOT APPLY THE CLOCK GATING PATCHES. The goal being to
> test what is in CVS.
> I get an exception 3 at startup causing a reset. So I believe my problems
> are related to what is in CVS, and may not be related to this patch.
If you are using FXM, that might be a problem. The CVS is not updated with
patches that I have sent you. Also there may be some divergence between CVS and
your patches due to recent large commit of FPU support.
I just tested clock gating patches against CVS on TWR-K70F120M, I ran
nc_test_slave and fileiotest These combined include hal_diag serial, Ethernet,
DMA and DSPI. I also tried RedBoot that includes Flash support.
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