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[PATCH] add bfin target
- From: "Alain Schaefer" <alani at easc dot ch>
- To: newlib at sources dot redhat dot com
- Date: Wed, 13 Sep 2006 20:21:59 +0200
- Subject: [PATCH] add bfin target
Hi,
Attached is a minimal patch to add blackfin support.
It was needed to create a port of RTESM to blackfin architecture.
The patch basically just implements setjmp/longjmp.
Please review and tell me what changes would
be needed to commit it.
Thanks to joel for helping me to create this patch.
alani
diff -urN newlib-1.14.0-orig/newlib/configure.host newlib-1.14.0/newlib/configure.host
--- newlib-1.14.0-orig/newlib/configure.host 2005-12-12 12:25:07.000000000 +0100
+++ newlib-1.14.0/newlib/configure.host 2006-08-18 13:11:47.000000000 +0200
@@ -96,6 +96,9 @@
avr*)
newlib_cflags="${newlib_cflags} -DPREFER_SIZE_OVER_SPEED -mcall-prologues"
;;
+ bfin)
+ machine_dir=bfin
+ ;;
cris | crisv32)
machine_dir=cris
;;
diff -urN newlib-1.14.0-orig/newlib/libc/include/machine/ieeefp.h newlib-1.14.0/newlib/libc/include/machine/ieeefp.h
--- newlib-1.14.0-orig/newlib/libc/include/machine/ieeefp.h 2005-12-13 23:57:31.000000000 +0100
+++ newlib-1.14.0/newlib/libc/include/machine/ieeefp.h 2006-08-18 13:17:19.000000000 +0200
@@ -278,6 +278,10 @@
#define __IEEE_LITTLE_ENDIAN
#endif
+#ifdef BFIN
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
#ifndef __IEEE_BIG_ENDIAN
#ifndef __IEEE_LITTLE_ENDIAN
#error Endianess not declared!!
diff -urN newlib-1.14.0-orig/newlib/libc/machine/bfin/configure.in newlib-1.14.0/newlib/libc/machine/bfin/configure.in
--- newlib-1.14.0-orig/newlib/libc/machine/bfin/configure.in 1970-01-01 01:00:00.000000000 +0100
+++ newlib-1.14.0/newlib/libc/machine/bfin/configure.in 2006-08-18 13:08:06.000000000 +0200
@@ -0,0 +1,12 @@
+dnl This is the newlib/libc/machine/arm configure.in file.
+dnl Process this file with autoconf to produce a configure script.
+
+AC_PREREQ(2.5)
+AC_INIT(Makefile.am)
+
+dnl Can't be done in NEWLIB_CONFIGURE because that confuses automake.
+AC_CONFIG_AUX_DIR(../../../..)
+
+NEWLIB_CONFIGURE(../../..)
+
+AC_OUTPUT(Makefile)
diff -urN newlib-1.14.0-orig/newlib/libc/machine/bfin/Makefile.am newlib-1.14.0/newlib/libc/machine/bfin/Makefile.am
--- newlib-1.14.0-orig/newlib/libc/machine/bfin/Makefile.am 1970-01-01 01:00:00.000000000 +0100
+++ newlib-1.14.0/newlib/libc/machine/bfin/Makefile.am 2006-08-18 13:08:06.000000000 +0200
@@ -0,0 +1,12 @@
+## Process this file with automake to generate Makefile.in
+
+AUTOMAKE_OPTIONS = cygnus
+
+INCLUDES = $(NEWLIB_CFLAGS) $(CROSS_CFLAGS) $(TARGET_CFLAGS)
+
+noinst_LIBRARIES = lib.a
+
+lib_a_SOURCES = setjmp.S
+
+ACLOCAL_AMFLAGS = -I ../../..
+CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host
diff -urN newlib-1.14.0-orig/newlib/libc/machine/bfin/setjmp.S newlib-1.14.0/newlib/libc/machine/bfin/setjmp.S
--- newlib-1.14.0-orig/newlib/libc/machine/bfin/setjmp.S 1970-01-01 01:00:00.000000000 +0100
+++ newlib-1.14.0/newlib/libc/machine/bfin/setjmp.S 2006-08-18 16:16:04.000000000 +0200
@@ -0,0 +1,196 @@
+/*
+ * Setjmp/Longjump implementation for the Blackfin Architecture
+ */
+#define _ASM
+#define _SETJMP_H
+
+.text
+.global setjmp
+.align 4;
+setjmp:
+ /*save P0 first*/
+ [--SP] = P0;
+ P0 = R0;
+ [ P0 + 0x00 ] = R0;
+ [ P0 + 0x04 ] = R1;
+ [ P0 + 0x08 ] = R2;
+ [ P0 + 0x0c ] = R3;
+ [ P0 + 0x10 ] = R4;
+ [ P0 + 0x14 ] = R5;
+ [ P0 + 0x18 ] = R6;
+ [ P0 + 0x1c ] = R7;
+ [ P0 + 0x24 ] = P1;
+ /* save the original value of P0 */
+ P1 = [SP++];
+ [ P0 + 0x20 ] = P1;
+ [ P0 + 0x28 ] = P2;
+ [ P0 + 0x2c ] = P3;
+ [ P0 + 0x30 ] = P4;
+ [ P0 + 0x34 ] = P5;
+ [ P0 + 0x38 ] = FP;
+ [ P0 + 0x3c ] = SP;
+
+ /* save ASTAT */
+ R0 = ASTAT;
+ [P0 + 0x40] = R0;
+
+ /* save Loop Counters */
+ R0 = LC0;
+ [P0 + 0x44] = R0;
+ R0 = LC1;
+ [P0 + 0x48] = R0;
+
+ /* save Accumulators */
+ R0 = A0.W;
+ [P0 + 0x4C] = R0;
+ R0 = A0.X;
+ [P0 + 0x50] = R0;
+ R0 = A1.W;
+ [P0 + 0x54] = R0;
+ R0 = A1.X;
+ [P0 + 0x58] = R0;
+
+ /* save Index Registers */
+ R0 = I0;
+ [P0 + 0x5C] = R0;
+ R0 = I1;
+ [P0 + 0x60] = R0;
+ R0 = I2;
+ [P0 + 0x64] = R0;
+ R0 = I3;
+ [P0 + 0x68] = R0;
+
+ /* save Modifier Registers */
+ R0 = M0;
+ [P0 + 0x6C] = R0;
+ R0 = M1;
+ [P0 + 0x70] = R0;
+ R0 = M2;
+ [P0 + 0x74] = R0;
+ R0 = M3;
+ [P0 + 0x78] = R0;
+
+ /* save Length Registers */
+ R0 = L0;
+ [P0 + 0x7c] = R0;
+ R0 = L1;
+ [P0 + 0x80] = R0;
+ R0 = L2;
+ [P0 + 0x84] = R0;
+ R0 = L3;
+ [P0 + 0x88] = R0;
+
+ /* Base Registers */
+ R0 = B0;
+ [P0 + 0x8C] = R0;
+ R0 = B1;
+ [P0 + 0x90] = R0;
+ R0 = B2;
+ [P0 + 0x94] = R0;
+ R0 = B3;
+ [P0 + 0x98] = R0;
+
+ R0 = RETS;
+ [P0 + 0x9C] = R0;
+
+ /* return 0 in R0 */
+ R0 = 0x00;
+ RTS;
+
+
+.global longjmp
+longjmp:
+ /*setup P0*/
+ P0 = R0;
+ R2 = [ P0 + 0x08 ];
+ R3 = [ P0 + 0x0c ];
+ R4 = [ P0 + 0x10 ];
+ R5 = [ P0 + 0x14 ];
+ R6 = [ P0 + 0x18 ];
+ R7 = [ P0 + 0x1c ];
+ P1 = [ P0 + 0x24 ];
+ P2 = [ P0 + 0x28 ];
+ P3 = [ P0 + 0x2c ];
+ P4 = [ P0 + 0x30 ];
+ P5 = [ P0 + 0x34 ];
+ FP = [ P0 + 0x38 ];
+ SP = [ P0 + 0x3c ];
+
+ /* restore ASTAT */
+ R0 = [P0 + 0x40];
+ ASTAT = R0;
+
+ /* restore Loop Counters */
+ R0 = [P0 + 0x44];
+ LC0 = R0;
+ R0 = [P0 + 0x48];
+ LC1 = R0;
+
+ /* restore Accumulators */
+ R0 = [P0 + 0x4C];
+ A0.W = R0;
+ R0 = [P0 + 0x50];
+ A0.X = R0;
+ R0 = [P0 + 0x54];
+ A1.W = R0;
+ R0 = [P0 + 0x58];
+ A1.X = R0;
+
+ /* restore Index Registers */
+ R0 = [P0 + 0x5C];
+ I0 = R0;
+ R0 = [P0 + 0x60];
+ I1 = R0;
+ R0 = [P0 + 0x64];
+ I2 = R0;
+ R0 = [P0 + 0x68];
+ I3 = R0;
+
+ /* restore Modifier Registers */
+ R0 = [P0 + 0x6C];
+ M0 = R0;
+ R0 = [P0 + 0x70];
+ M1 = R0;
+ R0 = [P0 + 0x74];
+ M2 = R0;
+ R0 = [P0 + 0x78];
+ M3 = R0;
+
+ /* restore Length Registers */
+ R0 = [P0 + 0x7c];
+ L0 = R0;
+ R0 = [P0 + 0x80];
+ L1 = R0;
+ R0 = [P0 + 0x84];
+ L2 = R0;
+ R0 = [P0 + 0x88];
+ L3 = R0;
+
+ /* restore Base Registers */
+ R0 = [P0 + 0x8C];
+ B0 = R0;
+ R0 = [P0 + 0x90];
+ B1 = R0;
+ R0 = [P0 + 0x94];
+ B2 = R0;
+ R0 = [P0 + 0x98];
+ B3 = R0;
+
+ R0 = [P0 + 0x9C];
+ RETS = R0;
+
+
+
+ /* return orig R1 should be non zero */
+ CC = R1 == 0x0;
+ IF CC JUMP return1;
+ R0 = R1;
+ JUMP finished
+return1:
+ R0 = 0x1;
+jmpfinished:
+ /* restore R1 and P0 */
+ R1 = [P0 + 0x04]
+ P0 = [P0 + 0x20]
+ rts;
+