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Re: ecos realtek driver


Andy Dyer wrote:
I saw your message about cache coherency, and I think
you're right that a cache flush needs to happen after the transmit copy to buffers.


I'm not so certain about the receive cases - at least
on mips the HAL_DCACHE_SYNC is going to write lines
out to memory trashing the stuff your net controller
just put in there.  I think for receive it should be
HAL_DCACHE_INVALIDATE, but you would have to make sure
that no non-buffer data gets affected by that.

My assumption is that for the receive case, there is no reason for the data cache to contain dirty cache lines, since the driver should only ever read from that portion of memory. Of course, that means a HAL_DCACHE_INVALIDATE is all that is really needed. But that opens a new can of worms - how to determine which cache lines need to be invalidated, and how to make sure that the buffers allocated start and end on cache line boundaries to prevent interfering with other memory areas. While this shouldn't be too much of a problem for any given platform, doing this in a generic, portable way most certainly is.


P.S.: I've CCed this mail to ecos-discuss in the hope someone more knowledgeable than me has some good ideas on cache coherency in eCos. -- -------------------------------------------------------------------- | Eric Doenges | DynaPel Laboratories GmbH | | Tel: +49 89 962428 23 | Fraunhoferstrasse 9/2 | | Fax: +49 89 962428 90 | D - 85737 Ismaning, Germany | --------------------------------------------------------------------


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