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Possible bug regarding NVIC init in Cortexm arch HAL
- From: Daniel Helgason <dhelgason at shaw dot ca>
- To: ecos-discuss <ecos-discuss at ecos dot sourceware dot org>
- Date: Mon, 07 Mar 2011 18:01:20 -0800
- Subject: [ECOS] Possible bug regarding NVIC init in Cortexm arch HAL
Hello,
I think I spotted a possible bug in hal_misc.c file in the Cortexm arch
HAL.
On line 234 there is a snippet of code that loops, initializing both
hal_interrupt_handlers[] and the NVIC. The loop counts from 1 to
CYGNUM_HAL_ISR_COUNT. It looks something like this:
for( i = 1; i < CYGNUM_HAL_ISR_COUNT; i++ )
{
hal_interrupt_handlers[i] = (CYG_ADDRESS)hal_default_isr;
*** program NVIC priority for this interrupt; ***
}
This is not a problem for the existing Cortex platforms but it will be a
problem for platforms that springboard to additional interrupts that are
not controlled by the NVIC. They will have CYGNUM_INTERRUPT_xxx and
CYGNUM_HAL_ISR_COUNT that are greater than the number of interrupts
directly controlled by the NVIC (CYGNUM_HAL_INTERRUPT_NVIC_MAX).
I think the loop needs to be changed to two loops, one that sets
hal_interrupt_handlers table and one that sets NVIC priorities.
Something like this:
for( i = 1; i < CYGNUM_HAL_ISR_COUNT; i++ )
hal_interrupt_handlers[i] = (CYG_ADDRESS)hal_default_isr;
for( i = 1; i <= CYGNUM_HAL_INTERRUPT_NVIC_MAX; i++ )
*** program NVIC priority for this interrupt; ***
--
+------------------------------------
| Daniel Helgason <dhelgason@shaw.ca>
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