Index: ecos/packages/devs/serial/generic/16x5x/current/ChangeLog =================================================================== RCS file: /cvs/ecos/ecos/packages/devs/serial/generic/16x5x/current/ChangeLog,v retrieving revision 1.12 diff -a -w -u -r1.12 ChangeLog --- ecos/packages/devs/serial/generic/16x5x/current/ChangeLog 16 Jul 2003 02:09:28 -0000 1.12 +++ ecos/packages/devs/serial/generic/16x5x/current/ChangeLog 23 Sep 2003 08:31:35 -0000 @@ -1,3 +1,9 @@ +2003-09-23 Øyvind Harboe + * src/ser_16x5x.c (CYGDAT_IO_SERIAL_GENERIC_16X5X_SECONDARY_CFG): + Add to make it easier to add a 16x5x UART to a platform that + already has serial ports. E.g. OpenCores 16x5x UARTs to a + EB40a system. + 2003-07-16 Jonathan Larmour * src/ser_16x5x.c (CYG_IO_SERIAL_GENERIC_16X5X_INT_PRIORITY): Add Index: ecos/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c =================================================================== RCS file: /cvs/ecos/ecos/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c,v retrieving revision 1.11 diff -a -w -u -r1.11 ser_16x5x.c --- ecos/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c 16 Jul 2003 02:09:28 -0000 1.11 +++ ecos/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c 23 Sep 2003 08:31:37 -0000 @@ -65,6 +65,18 @@ // Only compile driver if an inline file with driver details was selected. #ifdef CYGDAT_IO_SERIAL_GENERIC_16X5X_INL +/* +The io/serial design is streamlined to a single type of UARTs in a system. +However, e.g. the opencores 16x5x UART is frequently implemented in FPGAs, +and may serve as a way to add additional UARTs to the system beyond those that +are in the CPU package itself. + +If such a "secondary" UART type exists, we include it here. +*/ +#ifdef CYGDAT_IO_SERIAL_GENERIC_16X5X_SECONDARY_CFG +#include CYGDAT_IO_SERIAL_GENERIC_16X5X_SECONDARY_CFG +#endif + #ifndef CYGPRI_IO_SERIAL_GENERIC_16X5X_STEP #define CYGPRI_IO_SERIAL_GENERIC_16X5X_STEP 1 #endif