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Re: [PATCH 1/2] Optimize generic spinlock code and use C11 like atomic macros.
- From: Szabolcs Nagy <szabolcs dot nagy at arm dot com>
- To: Stefan Liebler <stli at linux dot vnet dot ibm dot com>, <libc-alpha at sourceware dot org>
- Cc: <nd at arm dot com>
- Date: Wed, 22 Mar 2017 12:56:10 +0000
- Subject: Re: [PATCH 1/2] Optimize generic spinlock code and use C11 like atomic macros.
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On 21/03/17 15:43, Stefan Liebler wrote:
> On 03/14/2017 04:55 PM, Stefan Liebler wrote:
>> Okay. I've attached an updated patch. It is now using case 2).
>> This choice applies to pthread_spin_trylock.c and the first attempt to
>> acquire the lock in pthread_spin_lock.c.
>> Therefore I've introduced ATOMIC_EXCHANGE_USES_CAS for all architectures
>> in atomic-machine.h files. There is a check in include/atomic.h which
>> ensures that it is defined to either 0 or 1. Can you please review the
>> setting of 0 or 1?
>>
>> Bye Stefan
> Ping
>
the aarch64 changes look ok to me (but this is
something that ideally would be benchmarked on real
hw with interesting workload and i haven't done that
because it is non-trivial)
on a trivial benchmark it seems to be a bit better
than the current code.
the performance of the unconteded case can be improved
slightly by reverting the unlock change (the release
store is stronger than the barrier was, conceptually
there is a barrier before and after an armv8 release
store to prevent an independent load-acquire to get
reordered with it in either direction)
power consumption of a contended spin lock on armv8
can be improved using a send-event/wait-event mechanism,
but then the atomic_spin_nop needs to be in a loop with
an ll/sc pair not with a relaxed load.
(i guess we can introduce a target specific spinlock
if this turns out to be relevant)
(git apply complained about an extra newline at the
end of atomic.h)