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Re: [PATCH 2/3] aarch64: Optimized memchr specific to AmpereComputing emag
- From: Szabolcs Nagy <Szabolcs dot Nagy at arm dot com>
- To: Feng Xue <fxue at os dot amperecomputing dot com>, "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>
- Cc: nd <nd at arm dot com>
- Date: Wed, 19 Dec 2018 15:41:23 +0000
- Subject: Re: [PATCH 2/3] aarch64: Optimized memchr specific to AmpereComputing emag
- References: <BL0PR01MB4593146ADFE218DF380815BCF7BD0@BL0PR01MB4593.prod.exchangelabs.com>
On 18/12/2018 10:07, Feng Xue wrote:
> This version uses general register based memory instruction to load
> data, because vector register based is slightly slower in emag.
>
> Character-matching is performed on 16-byte (both size and alignment)
> memory block in parallel each iteration.
>
> * sysdeps/aarch64/memchr.S (__memchr): Rename to MEMCHR.
> [!MEMCHR](MEMCHR): Set to __memchr.
> * sysdeps/aarch64/multiarch/Makefile (sysdep_routines):
> Add memchr_generic and memchr_base.
> * sysdeps/aarch64/multiarch/ifunc-impl-list.c
> (__libc_ifunc_impl_list): Add memchr ifuncs.
> * sysdeps/aarch64/multiarch/memchr.c: New file.
> * sysdeps/aarch64/multiarch/memchr_generic.S: Likewise.
> * sysdeps/aarch64/multiarch/memchr_base.S: Likewise.
OK to commit.