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Re: [PATCH 13/28] powerpc: Remove optimized isnan
- From: "Gabriel F. T. Gomes" <gabriel at inconstante dot eti dot br>
- To: Adhemerval Zanella <adhemerval dot zanella at linaro dot org>
- Cc: <libc-alpha at sourceware dot org>
- Date: Wed, 5 Jun 2019 19:46:14 -0300
- Subject: Re: [PATCH 13/28] powerpc: Remove optimized isnan
- References: <20190329133529.22523-1-adhemerval.zanella@linaro.org> <20190329133529.22523-14-adhemerval.zanella@linaro.org>
On Fri, Mar 29 2019, Adhemerval Zanella wrote:
>
> - The power7 uses ftdiv to optimize for some input patterns, but at
> cost of others. Comparing against generic C implementation built
> for powerpc-linux-gnu-power4 (which uses the hp-timing support on
> benchtests):
>
> [...]
>
> So it basically optimizes marginally for normal numbers while
> increasing the latency for other kind of FP.
Fair enough.
> * sysdeps/powerpc/x/powerpc32/power4/fpu/multiarch/Makefile
^
Typo in this ChangeLog path.
> (sysdeps_routines): Remove s_isnan-* objects.
^~~~~~~~~~~~~~~~
Missing mention to similar changes in libm-sysdep_routines.
Also, maybe mention the removal of 's_isnanf-*' files, too. To make
clear that the removal of the float variants is intended.
I'm OK with the removal of the float variants, by the way. And my
concerns about sysdeps/ieee754/dbl-64/wordsize-64/ files do not apply
here, because there is no sysdeps/ieee754/flt-32/wordsize-64/.
This patch looks good to me, provided we have the previous patch
(<https://sourceware.org/ml/libc-alpha/2019-03/msg00673.html>), or some
alternative implementation merged, as well.
Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>