This is the mail archive of the
libc-alpha@sourceware.org
mailing list for the glibc project.
Re: [PATCH v2] aarch64: Optimized memset for Kunpeng processor.
- From: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>
- To: Xuelei Zhang <zhangxuelei4 at huawei dot com>, "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>, "siddhesh at gotplt dot org" <siddhesh at gotplt dot org>, Szabolcs Nagy <Szabolcs dot Nagy at arm dot com>, "jiangyikun at huawei dot com" <jiangyikun at huawei dot com>, "yikunkero at gmail dot com" <yikunkero at gmail dot com>
- Cc: nd <nd at arm dot com>
- Date: Fri, 1 Nov 2019 15:33:50 +0000
- Subject: Re: [PATCH v2] aarch64: Optimized memset for Kunpeng processor.
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KDUm7rC+rxqN8CCGBfVMpXI19llxbaf85H8XRnI9ayk=; b=mZibUp8W9gAaiZak7dIJ4Cp8ZOvm5t9HEdj3z0tsDTHqh9B9JGRRWgYaaTIbxiUq8lI4xmaoAxc6WcGI/n/vI124y9EgVX/C+sQMwOeTAD7xGbGEszfFkSnFbz49BecGYcc6CEURB1CZVV8Oox8yn2U9XNFuYrg5kR8X2yQChgJD5JXbPXn260tj1XRNVYcUz7ityWMeIpcmaOKD+obhtt7ZRiTAy40/0qBADXiNiz7rjBPHMPWBZjlKBcpeCGTXsfZ2dM8lid22PfjhVrcWTQgA+tnC5Sge8wa0UQjfVGROiFcdkBwEAWoaWxBsIEj8KsVltrznaCa6YCQucm/DIw==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=aI6TDoKWcnPv1g271/X1sX5h4XUbzFUgpHJchugsW7hdpPBt6uQjPhW7x9x+efOjJ9zOnZvwRS5DT8NTq/sjdeRqphzGKSyroO81YCo2Vt91nNSxvI+KfVOKybG8ecNhz0Kbr5jd0f/GGrkir6ZuhveqbnVHAUDB47yNCvfw7FsT1qROa394lloDCMIa7288l5xcAlv2ZwUD1yWsJ2Q3BYtA+X2Q0WEnzj1urHn5PdUahsl0k7ws76RKHD5iadF6y557rS8MjmvNm18seMPPObVzb7dX3MUZjyMZUgZAu+qJ86FFvQZxVfykOvNV77eGWv0xOFAhJM7as4pz2pl2Pw==
- Original-authentication-results: spf=none (sender IP is ) smtp.mailfrom=Wilco dot Dijkstra at arm dot com;
- References: <20191101131038.31348-1-zhangxuelei4@huawei.com>
Hi Xuelei,
+L(set127):
+ and tmp1, dstin, 15
+ bic dst, dstin, 15
+ stp q0,q0, [dst, 16]
+ str q0, [dst, 48]
+ stp q0, q0, [dstend, -64]
+ stp q0, q0, [dstend, -32]
+ ret
This won't work, when you align like that you need an extra unaligned store at the end.
The easiest solution is not to align and just keep the stp and str using dstin.
+2: stp q0, q0, [dst, 32]
+ stp q0, q0, [dstend, -32]
+ ret
Both of these must use dstend since this is the 1-64 bytes for the tail part.
Wilco