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PowerPC - Fix data cache sync on PPC60x
- From: Gary Thomas <gary at mlbassoc dot com>
- To: eCos patches <ecos-patches at sources dot redhat dot com>
- Date: 03 Jan 2003 20:40:22 -0700
- Subject: PowerPC - Fix data cache sync on PPC60x
Index: hal/powerpc/ppc60x/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/ppc60x/current/ChangeLog,v
retrieving revision 1.8
diff -u -5 -p -r1.8 ChangeLog
--- hal/powerpc/ppc60x/current/ChangeLog 24 Dec 2002 16:04:19 -0000 1.8
+++ hal/powerpc/ppc60x/current/ChangeLog 2 Jan 2003 23:22:38 -0000
@@ -1,5 +1,10 @@
+2003-01-02 Gary Thomas <gary@mlbassoc.com>
+
+ * include/var_cache.h: Define HAL_DCACHE_SYNC() - which had been
+ left out before!
+
2002-08-01 Gary Thomas <gary@mlbassoc.com>
* src/var_misc.c (cyg_hal_map_memory): Need to set protection bits.
* include/variant.inc: Additional exceptions. Also allow for
Index: hal/powerpc/ppc60x/current/include/var_cache.h
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/ppc60x/current/include/var_cache.h,v
retrieving revision 1.4
diff -u -5 -p -r1.4 var_cache.h
--- hal/powerpc/ppc60x/current/include/var_cache.h 24 Dec 2002 16:04:19 -0000 1.4
+++ hal/powerpc/ppc60x/current/include/var_cache.h 2 Jan 2003 23:22:39 -0000
@@ -9,11 +9,11 @@
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-// Copyright (C) 2002 Gary Thomas
+// Copyright (C) 2002, 2003 Gary Thomas
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
@@ -131,11 +131,18 @@
"r" (_HID0_DCFI) \
); \
CYG_MACRO_END
// Synchronize the contents of the cache with memory.
-#define HAL_DCACHE_SYNC()
+#define HAL_DCACHE_SYNC() \
+ CYG_MACRO_START \
+ cyg_int32 i; \
+ cyg_uint32 *__base = (cyg_uint32 *) (0); \
+ for (i = 0; i < (HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); i++, __base += HAL_DCACHE_LINE_SIZE/4){ \
+ asm volatile ("lwz %%r0,0(%0)" : : "r" (__base) : "r0"); \
+ } \
+ CYG_MACRO_END
// Query the state of the data cache
#define HAL_DCACHE_IS_ENABLED(_state_) \
CYG_MACRO_START \
cyg_int32 _scratch; \
--
------------------------------------------------------------
Gary Thomas |
MLB Associates | Consulting for the
+1 (970) 229-1963 | Embedded world
http://www.mlbassoc.com/ |
email: <gary@mlbassoc.com> |
gpg: http://www.chez-thomas.org/gary/gpg_key.asc
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