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Re: [PATCH] aarch64: Add tunable glibc.memset.dc_zva_threshold
- From: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>
- To: 'GNU C Library' <libc-alpha at sourceware dot org>, "fxue at os dot amperecomputing dot com" <fxue at os dot amperecomputing dot com>
- Cc: nd <nd at arm dot com>, Siddhesh Poyarekar <siddhesh at gotplt dot org>
- Date: Tue, 6 Aug 2019 16:17:56 +0000
- Subject: Re: [PATCH] aarch64: Add tunable glibc.memset.dc_zva_threshold
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Hi Feng,
> I still hope this tuning on dc zva can work for other aarch64 processors.
> Since we focus on emag, and got no other aarch64 machines on hand,
> Then, if someone of other aarch64 is willing to test this, that would be better.
I don't believe this kind of tunable is useful in general. DC ZVA exists because
it gives a speedup - quite significantly so on the latest microarchitectures, but it
improves gcc_r performance as well on older cores like Cortex-A57.
If you find that it doesn't help emag, the best option is to avoid DC ZVA
altogether - this is even faster as you don't have to execute the runtime check.
Or you could use a tunable to select between fixed settings of the DC ZVA.
In fact it might be useful to have a generic tunable which allows one to choose
specific ifuncs, eg. glibc.memset=__memset_no_dczva.
.p2align 4
L(set_long):
stp val, val, [dstin]
- cmp count, DC_ZVA_THRESHOLD
+#ifdef HAVE_DCZVA_THRESHOLD_TUNABLE
+ adrp tmp1, __dczva_threshold
+ add tmp1, tmp1, :lo12:__dczva_threshold
+ ldr tmp2, [tmp1] /* Load DC ZVA tunable threshold value. */
+ cmp count, tmp2
+#else
+ cmp count, DCZVA_THRESHOLD
+#endif
I don't think it makes sense to support both options here. The existing code
is carefully laid out so this undoes the 16-byte alignment of the following loops.
Wilco