[PATCH][AArch64] Cleanup memset

[Siddhesh Poyarekar]

On 12/03/20 22:36, Andrew Pinski wrote:
> By new you mean just publicly announced within a month that supports
> ZVA size of 128; OcteonTX 2 annoucment:
> https://www.marvell.com/company/newsroom/marvell-announces-octeon-tx2-family-of-multi-core-infrastructure-processors.html
> ?
> Yes there is significant speedup for using "DC ZVA" as the latency is
> one cycle compared to the multiple (8) cycles needed to fill the full
> 128byte cache line using stp.
> Yes querying ZVA size fast, only a 1 cycles latency.

Wouldn't a zva128 be an improvement over zva_other?  Perhaps even move
towards per-zva size ifuncs that gets rid of the need to do a size check
inside memset.  That way, memset_falkor simply becomes memset_zva64.
IIRC the reason why that suggestion was resisted (that was my initial
approach for the falkor memset) was that it didn't give any significant
improvement on other architectures.  That's probably not a strong enough
reason now that I think of it, given that there will be a reasonable
limit to the number of ifuncs that get spawned off here.

IIRC Richard had proposed a similar patch for multiple zva sizes some
years ago too, not sure what happened to that series.

Siddhesh