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[Bug 1001114] New port: NXP LPC17XX Variant, Olimex LPC-1766-STK platform
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: ecos-patches at ecos dot sourceware dot org
- Date: Sun, 6 Mar 2011 18:28:51 +0000
- Subject: [Bug 1001114] New port: NXP LPC17XX Variant, Olimex LPC-1766-STK platform
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--- Comment #28 from Sergei Gavrikov <email@example.com> 2011-03-06 18:28:40 GMT ---
(In reply to comment #27)
> Now here I submit correction of my bugs. This patch is incremental.
Ilija, thank you for your clean-ups.
> 1) Now is tested with RedBoot too. Previously had forgotten to synchronize
> memory region list for RedBoot after i renamed memory regions.
> Question: How much useful is RedBoot on these particular chips.
IMO, even if user cannot use RedBoot as a debug infra for the target, it
is great always to have an ability to build ROM monitor and try it. So,
> 2) Other changes are a monkey work, I tried to follow you in inactivation of
> non implemented stuff. I also re-introduce comments on enabled IO port pins,
> I hope now they are more descriptive:
> // Enable pins: TXD1. .. .. .. .. .. RXD0-TXD0 ..
> // Enable pins: .. .. .. .. .RTS1 .DTR1 DSR1-DCD1 CTS1-RXD1
> where dots (.) stand for non-enabled pins while names represent selected pin
> functionality. Dot's/names are in pairs according to LPC PINSEL register
> Anyway if you think they're not good enough you can remove them.
I get it (however, it looks a bit encrypted :-). I have doubts about the
"modem" signals which were turned on by default. Do you really need to
activate them in the statrup code? About comments-memo, I would prefer
to have (diff against your delta)
- // Enable UART0 and UART1 pins
- // Enable pins: TXD1. .. .. .. .. .. RXD0-TXD0 ..
- CYGHWR_HAL_LPC17XX_PIN_SET(CYGHWR_HAL_LPC17XX_REG_PINSEL0, 0x40000050);
- // Enable pins: .. .. .. .. .RTS1 .DTR1 DSR1-DCD1 CTS1-RXD1
- CYGHWR_HAL_LPC17XX_PIN_SET(CYGHWR_HAL_LPC17XX_REG_PINSEL1, 0x00001155);
+ // Enable UART0 and UART1
+ (1 /* TXD0 */ << 4) |
+ (1 /* RXD0 */ << 6) |
+ (1 /* TXD1 */ << 30)
+ (1 /* RXD1 */ << 0)
But, maybe someone will have alternative view (about "modem" signals).
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